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imx6: add support for gw5400-a

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Signed-off-by: Tim Harvey <tharvey@gateworks.com>

SVN-Revision: 37363
This commit is contained in:
Luka Perkov 2013-07-15 23:18:39 +00:00
parent 6ef9d30da7
commit af6eb6cc8c
8 changed files with 1866 additions and 11 deletions
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56
target/linux/imx6/config-3.10
View file

@ -20,6 +20,7 @@ CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SUNXI is not set
CONFIG_ARCH_SUPPORTS_MSI=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_ARCH_VIRT is not set
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
@ -28,13 +29,11 @@ CONFIG_ARM=y
# CONFIG_ARM_APPENDED_DTB is not set
# CONFIG_ARM_CPU_SUSPEND is not set
# CONFIG_ARM_ERRATA_430973 is not set
# CONFIG_ARM_ERRATA_643719 is not set
# CONFIG_ARM_ERRATA_720789 is not set
CONFIG_ARM_ERRATA_754322=y
# CONFIG_ARM_ERRATA_754327 is not set
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
# CONFIG_ARM_ERRATA_798181 is not set
CONFIG_ARM_GIC=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
@ -70,8 +69,11 @@ CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_XZ=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_IMX_UART_PORT=1
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
@ -79,7 +81,6 @@ CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
# CONFIG_DEBUG_USER is not set
CONFIG_DECOMPRESS_BZIP2=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_DECOMPRESS_XZ=y
CONFIG_DMADEVICES=y
@ -97,6 +98,8 @@ CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q-to1.bin"
CONFIG_EXTRA_FIRMWARE_DIR="firmware"
CONFIG_FEC=y
CONFIG_FRAME_POINTER=y
CONFIG_FS_MBCACHE=y
@ -148,6 +151,7 @@ CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IMX_ANATOP=y
CONFIG_HAVE_IMX_GPC=y
CONFIG_HAVE_IMX_MMDC=y
@ -166,9 +170,13 @@ CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SMP=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_IMX=y
# CONFIG_IMX2_WDT is not set
# CONFIG_IMX_DMA is not set
# CONFIG_IMX_SDMA is not set
CONFIG_IMX_PCIE=y
CONFIG_IMX_SDMA=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
@ -179,10 +187,10 @@ CONFIG_KTIME_SCALAR=y
CONFIG_LOCAL_TIMERS=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_M25PXX_USE_FAST_READ=y
# CONFIG_MACH_EUKREA_CPUIMX51SD is not set
# CONFIG_MACH_IMX51_DT is not set
# CONFIG_MACH_MX51_BABBAGE is not set
# CONFIG_MCPM is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MFD_SYSCON=y
CONFIG_MMC=y
@ -191,18 +199,30 @@ CONFIG_MMC_BLOCK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MPCORE_WATCHDOG is not set
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_GPMI_NAND=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_MTD_PHYSMAP_OF is not set
# CONFIG_MTD_SM_COMMON is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
# CONFIG_MTD_UBI_FASTMAP is not set
# CONFIG_MTD_UBI_GLUEBI is not set
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_MX3_IPU=y
CONFIG_MX3_IPU_IRQS=4
# CONFIG_MXC_DEBUG_BOARD is not set
# CONFIG_MXC_IRQ_PRIOR is not set
# CONFIG_MXS_DMA is not set
CONFIG_MXS_DMA=y
CONFIG_NEED_DMA_MAP_STATE=y
# CONFIG_NET_DMA is not set
# CONFIG_NET_IP_TUNNEL is not set
@ -217,15 +237,19 @@ CONFIG_OF_DEVICE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_I2C=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PCI_SYSCALL is not set
CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_PINCONF=y
@ -241,13 +265,14 @@ CONFIG_PROC_DEVICETREE=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_RATIONAL=y
CONFIG_RCU_STALL_COMMON=y
# CONFIG_RCU_USER_QS is not set
CONFIG_RD_BZIP2=y
CONFIG_RD_GZIP=y
CONFIG_RD_LZO=y
CONFIG_RD_XZ=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_SCHED_HRTICK=y
@ -259,6 +284,11 @@ CONFIG_SMP_ON_UP=y
# CONFIG_SOC_IMX53 is not set
CONFIG_SOC_IMX6Q=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_IMX=y
CONFIG_SPI_MASTER=y
CONFIG_STMP_DEVICE=y
CONFIG_STOP_MACHINE=y
# CONFIG_SWP_EMULATE is not set
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@ -266,11 +296,15 @@ CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_THUMB2_KERNEL is not set
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TREE_RCU=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_XZ=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_UID16=y
CONFIG_UIDGID_CONVERTED=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_XHCI is not set
CONFIG_USB_ARCH_HAS_XHCI=y
CONFIG_USE_GENERIC_SMP_HELPERS=y
CONFIG_USE_OF=y
CONFIG_VECTORS_BASE=0xffff0000
@ -279,4 +313,6 @@ CONFIG_VECTORS_BASE=0xffff0000
CONFIG_XPS=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA_FLAG=0

429
target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-gw5400-a.dts Normal file
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@ -0,0 +1,429 @@
/*
* Copyright 2013 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx6q-ventana.dtsi"
/ {
model = "Gateworks Ventana GW5400-A";
compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
aliases {
ethernet0 = &fec;
ethernet1 = &eth1;
sky2 = &eth1;
};
/* SDRAM addressing */
memory {
reg = <0x10000000 0x40000000>;
};
chosen {
bootargs = "console=ttymxc1,115200";
};
leds {
compatible = "gpio-leds";
led0: user0 {
label = "user0";
gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG# */
linux,default-trigger = "heartbeat";
};
led1: user1 {
label = "user1";
gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR# */
};
led2: user2 {
label = "user2";
gpios = <&gpio4 15 0>; /* 111 -> MX6_LOCLEDR# */
};
};
regulators {
compatible = "simple-bus";
reg_2p5v: 2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_otg_vbus: usb_otg_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 0>;
enable-active-high;
};
};
sound {
compatible = "fsl,imx6q-sabrelite-sgtl5000",
"fsl,imx-audio-sgtl5000";
model = "imx6q-sabrelite-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <4>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hog {
pinctrl_hog: hoggrp {
fsl,pins = <
/* USB OTG Power Enable */
MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000
/* 3:19 SPINOR_CS0# */
MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000
/* 1:09 MX6_DIO0 (could also be PWM1_PWM0) */
MX6Q_PAD_GPIO_9__GPIO1_IO09 0x80000000
/* 1:19 MX6_DIO1 (could also be PWM2_PWM0) */
MX6Q_PAD_SD1_DAT2__GPIO1_IO19 0x80000000
/* 2:09 MX6_DIO2 (could also be PWM3_PWM0) */
MX6Q_PAD_SD4_DAT1__GPIO2_IO09 0x80000000
/* 2:10 MX6_DIO3 (could also be PWM3_PWM0) */
MX6Q_PAD_SD4_DAT2__GPIO2_IO10 0x80000000
/* 1:16 USBHUB_RST# */
MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x80000000
/* PCIE IRQ */
MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
/* PCIE RST */
MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x08000000
/* 1:12 MIPI_DIO */
MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x80000000
/* AUD4_MCK */
MX6Q_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
};
};
#if 0
/* ipu1: IPU1_CSI0: HDMI reciver (Digital Video In) */
ipu1 {
pinctrl_ipu1_1: ipu1grp-5 {
fsl,pins = <
MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC
MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN
MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK
MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC
MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_DATA04
MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_DATA05
MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_DATA06
MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_DATA07
MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_DATA08
MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_DATA09
MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_DATA10
MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_DATA11
MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_DATA12
MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_DATA13
MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_DATA14
MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_DATA15
MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16
MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17
MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18
MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19
>;
};
};
/* ipu2: IPU1_CSI1: Analog Video Decoder (Analog Video In) */
/* IPU2_CSI1: Analog Video Decoder (Analog Video In) */
ipu2 {
pinctrl_ipu2_1: ipu2grp-1 {
fsl,pins = <
MX6Q_PAD_EIM_A17__IPU2_CSI1_DATA12
MX6Q_PAD_EIM_D27__IPU2_CSI1_DATA13
MX6Q_PAD_EIM_D26__IPU2_CSI1_DATA14
MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15
MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16
MX6Q_PAD_EIM_D18__IPU2_CSI1_DATA17
MX6Q_PAD_EIM_D16__IPU2_CSI1_DATA18
MX6Q_PAD_EIM_EB2__IPU2_CSI1_DATA19
MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC
MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC
// not sure why this causes kernel to crash in early init
// MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK
>;
};
};
/* ipu3: IPU2_DISP0: Analog Video Encoder (Analog Video Out) */
ipu3 {
pinctrl_ipu3_1: ipu3grp-5 {
fsl,pins = <
MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DATA00
MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DATA01
MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DATA02
MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DATA03
MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DATA04
MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DATA05
MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DATA06
MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DATA07
MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DATA08
MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DATA09
MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DATA10
MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DATA11
MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DATA12
MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DATA13
MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DATA14
MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DATA15
>;
};
};
#endif
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1_1>;
status = "okay";
flash: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "sst,w25q256";
spi-max-frequency = <30000000>;
reg = <0>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_2>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2_2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_1>;
status = "okay";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5_1>;
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&ssi2 {
fsl,mode = "i2s-slave";
status = "okay";
};
&can1 {
reg = <0x02090000 0x4000>;
interrupts = <0 110 0x04>;
//clock-frequency
status = "okay";
};
&usbh1 {
status = "okay";
};
&pcie {
rst-gpios = <&gpio1 29 0>; /* PCIESWT_RST# */
clken-gpios = <&gpio1 20 0>; /* not used */
status = "okay";
eth1: sky2@8 { /* MAC/PHY on bus 8 */
compatible = "marvell,sky2";
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 30 0>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3_2>;
cd-gpios = <&gpio7 0 0>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_3>;
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_1>;
eeprom: eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom1: eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom2: eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom3: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom4: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
rtc: ds1672@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
gpio: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
};
hwmon: gsc@29 {
compatible = "gw,gsp";
reg = <0x29>;
};
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_2>;
pmic: pfuze@08 {
compatible = "fsl,pfuze100";
reg = <0x0a>;
};
pciswitch: pex8609@3f {
compatible = "plx,pex8609";
reg = <0x3f>;
};
pciclkgen: si52147@6b {
compatible = "sil,si52147";
reg = <0x6b>;
};
};
&i2c3 {
status = "okay";
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_2>;
codec: sgtl5000@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks 169>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
};
accelerometer: mma8450@1c {
compatible = "fsl,mma8450";
reg = <0x1c>;
};
videoout: adv7393@2a {
compatible = "adi,adv7393";
reg = <0x2a>;
};
videoin: adv7180@20 {
compatible = "adi,adv7180";
reg = <0x20>;
};
hdmiin: adv7611@4c {
compatible = "adi,adv7611";
reg = <0x4c>;
};
touchscreen: egalax_ts@04 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
wakeup-gpios = <&gpio1 12 0>;
};
};
&ldb {
status = "okay";
lvds-channel@0 {
crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
};
};

51
target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6q-ventana.dtsi Normal file
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@ -0,0 +1,51 @@
/*
* Copyright 2013 Gateworks Corporation
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include "imx6q.dtsi"
/ {
model = "Gateworks Ventana";
system-serial = "";
// these are used by bootloader for disabling nodes
aliases {
// ethernet0 = &eth0;
// ethernet1 = &eth1;
ssi0 = &ssi1;
ssi1 = &ssi2;
ipu0 = &ipu1;
ipu1 = &ipu2;
// mipi_csi = &mipi_csi;
// mipi_dsi = &mipi_dsi;
usdhc0 = &usdhc1;
usdhc1 = &usdhc2;
usdhc2 = &usdhc3;
usdhc3 = &usdhc4;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
usb0 = &usbh3;
usb1 = &usbotg;
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
spi4 = &ecspi5;
pwm0 = &pwm1;
pwm1 = &pwm2;
pwm2 = &pwm3;
pwm3 = &pwm4;
can0 = &can1;
led0 = &led0;
led1 = &led1;
led2 = &led2;
};
};

156
target/linux/imx6/files-3.10/arch/arm/mach-imx/msi.c Normal file
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@ -0,0 +1,156 @@
/*
* arch/arm/mach-mx6/msi.c
*
* PCI MSI support for the imx processor
*
* Copyright (c) 2013, Boundary Devices.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
* Place - Suite 330, Boston, MA 02111-1307 USA.
*
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/msi.h>
#include <asm/bitops.h>
#include <asm/mach/irq.h>
#include <asm/irq.h>
#include <linux/irqchip/chained_irq.h>
#include "hardware.h"
#include "msi.h"
#define IMX_NUM_MSI_IRQS 128
static DECLARE_BITMAP(msi_irq_in_use, IMX_NUM_MSI_IRQS);
static int irq_base;
static void imx_msi_handler(unsigned int irq, struct irq_desc *desc)
{
int i, j;
unsigned status;
struct irq_chip *chip = irq_get_chip(irq);
irq_base = irq_alloc_descs(-1, 0, IMX_NUM_MSI_IRQS, 0);
if (irq_base < 0) {
printk(KERN_ERR "%s: could not allocate IRQ numbers\n", __func__);
return;
}
chained_irq_enter(chip, desc);
for (i = 0; i < 8; i++) {
status = imx_pcie_msi_pending(i);
while (status) {
j = __fls(status);
generic_handle_irq(irq_base + j);
status &= ~(1 << j);
}
irq_base += 32;
}
chained_irq_exit(chip, desc);
}
/*
* Dynamic irq allocate and deallocation
*/
int create_irq(void)
{
int irq, pos;
do {
pos = find_first_zero_bit(msi_irq_in_use, IMX_NUM_MSI_IRQS);
if ((unsigned)pos >= IMX_NUM_MSI_IRQS)
return -ENOSPC;
/* test_and_set_bit operates on 32-bits at a time */
} while (test_and_set_bit(pos, msi_irq_in_use));
irq = irq_base + pos;
dynamic_irq_init(irq);
return irq;
}
void destroy_irq(unsigned int irq)
{
int pos = irq - irq_base;
dynamic_irq_cleanup(irq);
clear_bit(pos, msi_irq_in_use);
}
void arch_teardown_msi_irq(unsigned int irq)
{
destroy_irq(irq);
}
static void imx_msi_irq_ack(struct irq_data *d)
{
return;
}
static void imx_msi_irq_enable(struct irq_data *d)
{
imx_pcie_enable_irq(d->irq - irq_base, 1);
return unmask_msi_irq(d);
}
static void imx_msi_irq_disable(struct irq_data *d)
{
imx_pcie_enable_irq(d->irq - irq_base, 0);
return mask_msi_irq(d);
}
static void imx_msi_irq_mask(struct irq_data *d)
{
imx_pcie_mask_irq(d->irq - irq_base, 1);
return mask_msi_irq(d);
}
static void imx_msi_irq_unmask(struct irq_data *d)
{
imx_pcie_mask_irq(d->irq - irq_base, 0);
return unmask_msi_irq(d);
}
static struct irq_chip imx_msi_chip = {
.name = "PCIe-MSI",
.irq_ack = imx_msi_irq_ack,
.irq_enable = imx_msi_irq_enable,
.irq_disable = imx_msi_irq_disable,
.irq_mask = imx_msi_irq_mask,
.irq_unmask = imx_msi_irq_unmask,
};
int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
int irq = create_irq();
struct msi_msg msg;
if (irq < 0)
return irq;
irq_set_msi_desc(irq, desc);
msg.address_hi = 0x0;
msg.address_lo = MSI_MATCH_ADDR;
msg.data = (mxc_cpu_type << 15) | ((irq - irq_base) & 0xff);
write_msi_msg(irq, &msg);
irq_set_chip_and_handler(irq, &imx_msi_chip, handle_simple_irq);
set_irq_flags(irq, IRQF_VALID);
pr_info("%s: %d of %d\n", __func__, irq, NR_IRQS);
return 0;
}
void imx_msi_init(void)
{
irq_set_chained_handler(MXC_INT_PCIE_0, imx_msi_handler);
}

29
target/linux/imx6/files-3.10/arch/arm/mach-imx/msi.h Normal file
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@ -0,0 +1,29 @@
/*
* Copyright (C) 2013 Boundary Devices, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
void imx_pcie_enable_irq(unsigned pos, int set);
void imx_pcie_mask_irq(unsigned pos, int set);
unsigned imx_pcie_msi_pending(unsigned index);
#define MSI_MATCH_ADDR 0x10000050
#define MXC_INT_PCIE_0 152
#define MXC_INT_PCIE_1 153
#define MXC_INT_PCIE_2 154
#define MXC_INT_PCIE_3 155
void imx_msi_init(void);

1037
target/linux/imx6/files-3.10/arch/arm/mach-imx/pcie.c Normal file
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File diff suppressed because it is too large Load diff

116
target/linux/imx6/files-3.10/firmware/imx/sdma/sdma-imx6q-to1.bin.ihex Normal file
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@ -0,0 +1,116 @@
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3
target/linux/imx6/image/Makefile
View file

@ -8,7 +8,8 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
BOARDS := \
imx6dl-wandboard
imx6dl-wandboard \
imx6q-gw5400-a
# board-specific Flattened Image Tree
define mkfit