Add a driver for Atheros AR8216 switches Thanks to Vertical Communications, Inc. for providing access to the documentation
SVN-Revision: 15482
This commit is contained in:
parent
d26ec37d18
commit
a523450678
8 changed files with 747 additions and 0 deletions
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@ -19,6 +19,7 @@ CONFIG_AIO=y
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# CONFIG_AMIGA_PARTITION is not set
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CONFIG_ANON_INODES=y
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# CONFIG_APPLICOM is not set
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# CONFIG_AR8216_PHY is not set
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CONFIG_ARCH_FLATMEM_ENABLE=y
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# CONFIG_ARCNET is not set
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CONFIG_ARPD=y
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@ -20,6 +20,7 @@ CONFIG_AIO=y
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# CONFIG_AMIGA_PARTITION is not set
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CONFIG_ANON_INODES=y
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# CONFIG_APPLICOM is not set
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# CONFIG_AR8216_PHY is not set
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CONFIG_ARCH_FLATMEM_ENABLE=y
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# CONFIG_ARCNET is not set
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CONFIG_ARPD=y
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@ -20,6 +20,7 @@ CONFIG_AIO=y
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# CONFIG_AMIGA_PARTITION is not set
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CONFIG_ANON_INODES=y
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# CONFIG_APPLICOM is not set
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# CONFIG_AR8216_PHY is not set
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CONFIG_ARCH_FLATMEM_ENABLE=y
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# CONFIG_ARCNET is not set
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CONFIG_ARPD=y
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528
target/linux/generic-2.6/files/drivers/net/phy/ar8216.c
Normal file
528
target/linux/generic-2.6/files/drivers/net/phy/ar8216.c
Normal file
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@ -0,0 +1,528 @@
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/*
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* ar8216.c: AR8216 switch driver
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*
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* Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/if.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/if_ether.h>
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#include <linux/skbuff.h>
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#include <linux/netdevice.h>
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#include <linux/netlink.h>
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#include <linux/bitops.h>
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#include <net/genetlink.h>
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#include <linux/switch.h>
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#include <linux/delay.h>
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#include <linux/phy.h>
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#include "ar8216.h"
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#define AR8216_REG_PORT_RATE(_i) (AR8216_PORT_OFFSET(_i) + 0x000c)
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#define AR8216_REG_PORT_PRIO(_i) (AR8216_PORT_OFFSET(_i) + 0x0010)
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struct ar8216_priv {
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struct switch_dev dev;
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struct phy_device *phy;
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u32 (*read)(struct ar8216_priv *priv, int reg);
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void (*write)(struct ar8216_priv *priv, int reg, u32 val);
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/* all fields below are cleared on reset */
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bool vlan;
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u8 vlan_id[AR8216_NUM_VLANS];
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u8 vlan_table[AR8216_NUM_VLANS];
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u8 vlan_tagged;
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u16 pvid[AR8216_NUM_PORTS];
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};
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static struct switch_dev athdev;
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#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
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static inline void
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split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
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{
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regaddr >>= 1;
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*r1 = regaddr & 0x1e;
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regaddr >>= 5;
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*r2 = regaddr & 0x7;
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regaddr >>= 3;
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*page = regaddr & 0x1ff;
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}
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static u32
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ar8216_mii_read(struct ar8216_priv *priv, int reg)
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{
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struct phy_device *phy = priv->phy;
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u16 r1, r2, page;
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u16 lo, hi;
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split_addr((u32) reg, &r1, &r2, &page);
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phy->bus->write(phy->bus, 0x18, 0, page);
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lo = phy->bus->read(phy->bus, 0x10 | r2, r1);
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hi = phy->bus->read(phy->bus, 0x10 | r2, r1 + 1);
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return (hi << 16) | lo;
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}
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static void
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ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
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{
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struct phy_device *phy = priv->phy;
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u16 r1, r2, r3;
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u16 lo, hi;
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split_addr((u32) reg, &r1, &r2, &r3);
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phy->bus->write(phy->bus, 0x18, 0, r3);
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lo = val & 0xffff;
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hi = (u16) (val >> 16);
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phy->bus->write(phy->bus, 0x10 | r2, r1 + 1, hi);
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phy->bus->write(phy->bus, 0x10 | r2, r1, lo);
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}
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static u32
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ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
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{
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u32 v;
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v = priv->read(priv, reg);
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v &= ~mask;
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v |= val;
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priv->write(priv, reg, v);
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return v;
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}
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static int
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ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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priv->vlan = !!val->value.i;
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return 0;
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}
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static int
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ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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val->value.i = priv->vlan;
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return 0;
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}
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static int
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ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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priv->pvid[port] = vlan;
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return 0;
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}
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static int
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ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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*vlan = priv->pvid[port];
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return 0;
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}
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static int
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ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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priv->vlan_id[val->port_vlan] = val->value.i;
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return 0;
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}
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static int
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ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
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struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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val->value.i = priv->vlan_id[val->port_vlan];
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return 0;
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}
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static struct switch_attr ar8216_globals[] = {
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{
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.type = SWITCH_TYPE_INT,
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.name = "vlan",
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.description = "Enable VLAN mode",
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.set = ar8216_set_vlan,
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.get = ar8216_get_vlan,
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.max = 1
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},
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};
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static struct switch_attr ar8216_port[] = {
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};
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static struct switch_attr ar8216_vlan[] = {
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{
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.type = SWITCH_TYPE_INT,
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.name = "pvid",
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.description = "VLAN ID",
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.set = ar8216_set_vid,
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.get = ar8216_get_vid,
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.max = 4095,
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},
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};
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static int
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ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 ports = priv->vlan_table[val->port_vlan];
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int i;
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val->len = 0;
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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struct switch_port *p;
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if (!(ports & (1 << i)))
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continue;
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p = &val->value.ports[val->len++];
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p->id = i;
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if (priv->vlan_tagged & (1 << i))
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p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
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else
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p->flags = 0;
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}
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return 0;
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}
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static int
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ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 *vt = &priv->vlan_table[val->port_vlan];
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int i, j;
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*vt = 0;
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for (i = 0; i < val->len; i++) {
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struct switch_port *p = &val->value.ports[i];
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if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
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priv->vlan_tagged |= (1 << p->id);
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else {
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priv->vlan_tagged &= ~(1 << p->id);
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priv->pvid[p->id] = val->port_vlan;
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/* make sure that an untagged port does not
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* appear in other vlans */
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for (j = 0; j < AR8216_NUM_VLANS; j++) {
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if (j == val->port_vlan)
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continue;
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priv->vlan_table[j] &= ~(1 << p->id);
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}
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}
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*vt |= 1 << p->id;
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}
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return 0;
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}
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static int
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ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
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{
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int timeout = 20;
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while ((priv->read(priv, reg) & mask) != val) {
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if (timeout-- <= 0) {
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printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
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return 1;
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}
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}
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return 0;
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}
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static void
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ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
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{
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if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
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return;
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if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
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val &= AR8216_VTUDATA_MEMBER;
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val |= AR8216_VTUDATA_VALID;
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priv->write(priv, AR8216_REG_VTU_DATA, val);
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}
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op |= AR8216_VTU_ACTIVE;
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priv->write(priv, AR8216_REG_VTU, op);
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}
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static int
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ar8216_hw_apply(struct switch_dev *dev)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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u8 portmask[AR8216_NUM_PORTS];
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int i, j;
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/* flush all vlan translation unit entries */
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ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
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memset(portmask, 0, sizeof(portmask));
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if (priv->vlan) {
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/* calculate the port destination masks and load vlans
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* into the vlan translation unit */
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for (j = 0; j < AR8216_NUM_VLANS; j++) {
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u8 vp = priv->vlan_table[j];
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if (!vp)
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continue;
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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u8 mask = (1 << i);
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if (vp & mask)
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portmask[i] |= vp & ~mask;
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}
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if (!priv->vlan_table[j])
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continue;
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ar8216_vtu_op(priv,
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AR8216_VTU_OP_LOAD |
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(priv->vlan_id[j] << AR8216_VTU_VID_S),
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priv->vlan_table[j]);
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}
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} else {
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/* vlan disabled:
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* isolate all ports, but connect them to the cpu port */
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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if (i == AR8216_PORT_CPU)
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continue;
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portmask[i] = 1 << AR8216_PORT_CPU;
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portmask[AR8216_PORT_CPU] |= (1 << i);
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}
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}
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/* update the port destination mask registers and tag settings */
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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int egress, ingress;
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int pvid;
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if (priv->vlan) {
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pvid = priv->vlan_id[priv->pvid[i]];
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} else {
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pvid = i;
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}
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if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
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egress = AR8216_OUT_ADD_VLAN;
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ingress = AR8216_IN_PORT_FALLBACK;
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} else {
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egress = AR8216_OUT_STRIP_VLAN;
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ingress = AR8216_IN_SECURE;
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}
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ar8216_rmw(priv, AR8216_REG_PORT_CTRL(i),
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AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
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AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
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AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
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AR8216_PORT_CTRL_LEARN |
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(egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
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(priv->vlan ? AR8216_PORT_CTRL_SINGLE_VLAN : 0) |
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(AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
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ar8216_rmw(priv, AR8216_REG_PORT_VLAN(i),
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AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
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AR8216_PORT_VLAN_DEFAULT_ID,
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(portmask[i] << AR8216_PORT_VLAN_DEST_PORTS_S) |
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(ingress << AR8216_PORT_VLAN_MODE_S) |
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(pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
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}
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return 0;
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}
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static int
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ar8216_reset_switch(struct switch_dev *dev)
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{
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struct ar8216_priv *priv = to_ar8216(dev);
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int i;
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memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
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offsetof(struct ar8216_priv, vlan));
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for (i = 0; i < AR8216_NUM_VLANS; i++) {
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priv->vlan_id[i] = i;
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}
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for (i = 0; i < AR8216_NUM_PORTS; i++) {
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/* Enable port learning and tx */
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priv->write(priv, AR8216_REG_PORT_CTRL(i),
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AR8216_PORT_CTRL_LEARN |
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(4 << AR8216_PORT_CTRL_STATE_S));
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priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
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/* Configure all PHYs */
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if (i == AR8216_PORT_CPU) {
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priv->write(priv, AR8216_REG_PORT_STATUS(i),
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AR8216_PORT_STATUS_LINK_UP |
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AR8216_PORT_STATUS_SPEED |
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AR8216_PORT_STATUS_TXMAC |
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AR8216_PORT_STATUS_RXMAC |
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AR8216_PORT_STATUS_DUPLEX);
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} else {
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priv->write(priv, AR8216_REG_PORT_STATUS(i),
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AR8216_PORT_STATUS_LINK_AUTO);
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}
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}
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/* XXX: undocumented magic from atheros, required! */
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priv->write(priv, 0x38, 0xc000050e);
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return ar8216_hw_apply(dev);
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}
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static int
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ar8216_config_init(struct phy_device *pdev)
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{
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struct ar8216_priv *priv;
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int ret;
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printk("%s: AR8216 PHY driver attached.\n", pdev->attached_dev->name);
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pdev->supported = ADVERTISED_100baseT_Full;
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pdev->advertising = ADVERTISED_100baseT_Full;
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priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
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if (priv == NULL)
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return -ENOMEM;
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priv->phy = pdev;
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priv->read = ar8216_mii_read;
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priv->write = ar8216_mii_write;
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memcpy(&priv->dev, &athdev, sizeof(struct switch_dev));
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pdev->priv = priv;
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if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
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kfree(priv);
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goto done;
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}
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ret = ar8216_reset_switch(&priv->dev);
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done:
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return ret;
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}
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static int
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ar8216_read_status(struct phy_device *phydev)
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{
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struct ar8216_priv *priv = phydev->priv;
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phydev->speed = SPEED_100;
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phydev->duplex = DUPLEX_FULL;
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phydev->state = PHY_UP;
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/* flush the address translation unit */
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if (ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0))
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return -ETIMEDOUT;
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priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
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||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ar8216_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ar8216_probe(struct phy_device *pdev)
|
||||
{
|
||||
struct ar8216_priv priv;
|
||||
|
||||
u8 id, rev;
|
||||
u32 val;
|
||||
|
||||
priv.phy = pdev;
|
||||
val = ar8216_mii_read(&priv, AR8216_REG_CTRL);
|
||||
rev = val & 0xff;
|
||||
id = (val >> 8) & 0xff;
|
||||
if ((id != 1) || (rev != 1))
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
ar8216_remove(struct phy_device *pdev)
|
||||
{
|
||||
struct ar8216_priv *priv = pdev->priv;
|
||||
|
||||
if (!priv)
|
||||
return;
|
||||
|
||||
unregister_switch(&priv->dev);
|
||||
kfree(priv);
|
||||
}
|
||||
|
||||
/* template */
|
||||
static struct switch_dev athdev = {
|
||||
.name = "Atheros AR8216",
|
||||
.cpu_port = AR8216_PORT_CPU,
|
||||
.ports = AR8216_NUM_PORTS,
|
||||
.vlans = AR8216_NUM_VLANS,
|
||||
.attr_global = {
|
||||
.attr = ar8216_globals,
|
||||
.n_attr = ARRAY_SIZE(ar8216_globals),
|
||||
},
|
||||
.attr_port = {
|
||||
.attr = ar8216_port,
|
||||
.n_attr = ARRAY_SIZE(ar8216_port),
|
||||
},
|
||||
.attr_vlan = {
|
||||
.attr = ar8216_vlan,
|
||||
.n_attr = ARRAY_SIZE(ar8216_vlan),
|
||||
},
|
||||
.get_port_pvid = ar8216_get_pvid,
|
||||
.set_port_pvid = ar8216_set_pvid,
|
||||
.get_vlan_ports = ar8216_get_ports,
|
||||
.set_vlan_ports = ar8216_set_ports,
|
||||
.apply_config = ar8216_hw_apply,
|
||||
.reset_switch = ar8216_reset_switch,
|
||||
};
|
||||
|
||||
static struct phy_driver ar8216_driver = {
|
||||
.name = "Atheros AR8216",
|
||||
.features = PHY_BASIC_FEATURES,
|
||||
.probe = ar8216_probe,
|
||||
.remove = ar8216_remove,
|
||||
.config_init = &ar8216_config_init,
|
||||
.config_aneg = &ar8216_config_aneg,
|
||||
.read_status = &ar8216_read_status,
|
||||
.driver = { .owner = THIS_MODULE },
|
||||
};
|
||||
|
||||
int __init
|
||||
ar8216_init(void)
|
||||
{
|
||||
return phy_driver_register(&ar8216_driver);
|
||||
}
|
||||
|
||||
void __exit
|
||||
ar8216_exit(void)
|
||||
{
|
||||
phy_driver_unregister(&ar8216_driver);
|
||||
}
|
||||
|
||||
module_init(ar8216_init);
|
||||
module_exit(ar8216_exit);
|
||||
MODULE_LICENSE("GPL");
|
||||
|
147
target/linux/generic-2.6/files/drivers/net/phy/ar8216.h
Normal file
147
target/linux/generic-2.6/files/drivers/net/phy/ar8216.h
Normal file
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* ar8216.h: AR8216 switch driver
|
||||
*
|
||||
* Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __AR8216_H
|
||||
#define __AR8216_H
|
||||
|
||||
#define BITS(_s, _n) (((1UL << (_n)) - 1) << _s)
|
||||
|
||||
#define AR8216_PORT_CPU 0
|
||||
#define AR8216_NUM_PORTS 6
|
||||
#define AR8216_NUM_VLANS 16
|
||||
|
||||
#define AR8216_REG_CTRL 0x0000
|
||||
#define AR8216_CTRL_RESET BIT(31)
|
||||
|
||||
#define AR8216_REG_VTU 0x0040
|
||||
#define AR8216_VTU_OP BITS(0, 3)
|
||||
#define AR8216_VTU_OP_NOOP 0x0
|
||||
#define AR8216_VTU_OP_FLUSH 0x1
|
||||
#define AR8216_VTU_OP_LOAD 0x2
|
||||
#define AR8216_VTU_OP_PURGE 0x3
|
||||
#define AR8216_VTU_OP_REMOVE_PORT 0x4
|
||||
#define AR8216_VTU_ACTIVE BIT(3)
|
||||
#define AR8216_VTU_FULL BIT(4)
|
||||
#define AR8216_VTU_PORT BITS(8, 4)
|
||||
#define AR8216_VTU_PORT_S 8
|
||||
#define AR8216_VTU_VID BITS(16, 12)
|
||||
#define AR8216_VTU_VID_S 16
|
||||
#define AR8216_VTU_PRIO BITS(28, 3)
|
||||
#define AR8216_VTU_PRIO_S 28
|
||||
#define AR8216_VTU_PRIO_EN BIT(31)
|
||||
|
||||
#define AR8216_REG_VTU_DATA 0x0044
|
||||
#define AR8216_VTUDATA_MEMBER BITS(0, 10)
|
||||
#define AR8216_VTUDATA_VALID BIT(11)
|
||||
|
||||
#define AR8216_REG_ATU 0x0050
|
||||
#define AR8216_ATU_OP BITS(0, 3)
|
||||
#define AR8216_ATU_OP_NOOP 0x0
|
||||
#define AR8216_ATU_OP_FLUSH 0x1
|
||||
#define AR8216_ATU_OP_LOAD 0x2
|
||||
#define AR8216_ATU_OP_PURGE 0x3
|
||||
#define AR8216_ATU_OP_FLUSH_LOCKED 0x4
|
||||
#define AR8216_ATU_OP_FLUSH_UNICAST 0x5
|
||||
#define AR8216_ATU_OP_GET_NEXT 0x6
|
||||
#define AR8216_ATU_ACTIVE BIT(3)
|
||||
#define AR8216_ATU_PORT_NUM BITS(8, 4)
|
||||
#define AR8216_ATU_FULL_VIO BIT(12)
|
||||
#define AR8216_ATU_ADDR4 BIT(16, 8)
|
||||
#define AR8216_ATU_ADDR5 BIT(24, 8)
|
||||
|
||||
#define AR8216_REG_ATU_DATA 0x0054
|
||||
#define AR8216_ATU_ADDR3 BIT(0, 8)
|
||||
#define AR8216_ATU_ADDR2 BIT(8, 8)
|
||||
#define AR8216_ATU_ADDR1 BIT(16, 8)
|
||||
#define AR8216_ATU_ADDR0 BIT(24, 8)
|
||||
|
||||
#define AR8216_PORT_OFFSET(_i) (0x0100 * (i + 1))
|
||||
#define AR8216_REG_PORT_STATUS(_i) (AR8216_PORT_OFFSET(_i) + 0x0000)
|
||||
#define AR8216_PORT_STATUS_SPEED BIT(0)
|
||||
#define AR8216_PORT_STATUS_SPEED_ERR BIT(1)
|
||||
#define AR8216_PORT_STATUS_TXMAC BIT(2)
|
||||
#define AR8216_PORT_STATUS_RXMAC BIT(3)
|
||||
#define AR8216_PORT_STATUS_TXFLOW BIT(4)
|
||||
#define AR8216_PORT_STATUS_RXFLOW BIT(5)
|
||||
#define AR8216_PORT_STATUS_DUPLEX BIT(6)
|
||||
#define AR8216_PORT_STATUS_LINK_UP BIT(8)
|
||||
#define AR8216_PORT_STATUS_LINK_AUTO BIT(9)
|
||||
#define AR8216_PORT_STATUS_LINK_PAUSE BIT(10)
|
||||
|
||||
#define AR8216_REG_PORT_CTRL(_i) (AR8216_PORT_OFFSET(_i) + 0x0004)
|
||||
|
||||
/* port forwarding state */
|
||||
#define AR8216_PORT_CTRL_STATE BITS(0, 3)
|
||||
#define AR8216_PORT_CTRL_STATE_S 0
|
||||
|
||||
#define AR8216_PORT_CTRL_LEARN_LOCK BIT(7)
|
||||
|
||||
/* egress 802.1q mode */
|
||||
#define AR8216_PORT_CTRL_VLAN_MODE BITS(8, 2)
|
||||
#define AR8216_PORT_CTRL_VLAN_MODE_S 8
|
||||
|
||||
#define AR8216_PORT_CTRL_IGMP_SNOOP BIT(10)
|
||||
#define AR8216_PORT_CTRL_HEADER BIT(11)
|
||||
#define AR8216_PORT_CTRL_MAC_LOOP BIT(12)
|
||||
#define AR8216_PORT_CTRL_SINGLE_VLAN BIT(13)
|
||||
#define AR8216_PORT_CTRL_LEARN BIT(14)
|
||||
#define AR8216_PORT_CTRL_MIRROR_TX BIT(16)
|
||||
#define AR8216_PORT_CTRL_MIRROR_RX BIT(17)
|
||||
|
||||
#define AR8216_REG_PORT_VLAN(_i) (AR8216_PORT_OFFSET(_i) + 0x0008)
|
||||
|
||||
#define AR8216_PORT_VLAN_DEFAULT_ID BITS(0, 12)
|
||||
#define AR8216_PORT_VLAN_DEFAULT_ID_S 0
|
||||
|
||||
#define AR8216_PORT_VLAN_DEST_PORTS BITS(16, 9)
|
||||
#define AR8216_PORT_VLAN_DEST_PORTS_S 16
|
||||
|
||||
/* bit0 added to the priority field of egress frames */
|
||||
#define AR8216_PORT_VLAN_TX_PRIO BIT(27)
|
||||
|
||||
/* port default priority */
|
||||
#define AR8216_PORT_VLAN_PRIORITY BITS(28, 2)
|
||||
#define AR8216_PORT_VLAN_PRIORITY_S 28
|
||||
|
||||
/* ingress 802.1q mode */
|
||||
#define AR8216_PORT_VLAN_MODE BITS(30, 2)
|
||||
#define AR8216_PORT_VLAN_MODE_S 30
|
||||
|
||||
/* ingress 802.1q mode */
|
||||
enum {
|
||||
AR8216_IN_PORT_ONLY = 0,
|
||||
AR8216_IN_PORT_FALLBACK = 1,
|
||||
AR8216_IN_VLAN_ONLY = 2,
|
||||
AR8216_IN_SECURE = 3
|
||||
};
|
||||
|
||||
/* egress 802.1q mode */
|
||||
enum {
|
||||
AR8216_OUT_KEEP = 0,
|
||||
AR8216_OUT_STRIP_VLAN = 1,
|
||||
AR8216_OUT_ADD_VLAN = 2
|
||||
};
|
||||
|
||||
/* port forwarding state */
|
||||
enum {
|
||||
AR8216_PORT_STATE_DISABLED = 0,
|
||||
AR8216_PORT_STATE_BLOCK = 1,
|
||||
AR8216_PORT_STATE_LISTEN = 2,
|
||||
AR8216_PORT_STATE_LEARN = 3,
|
||||
AR8216_PORT_STATE_FORWARD = 4
|
||||
};
|
||||
|
||||
#endif
|
23
target/linux/generic-2.6/patches-2.6.28/680-phy_ar8216.patch
Normal file
23
target/linux/generic-2.6/patches-2.6.28/680-phy_ar8216.patch
Normal file
|
@ -0,0 +1,23 @@
|
|||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -84,6 +84,10 @@ config IP175C_PHY
|
||||
tristate "Driver for IC+ IP175C/IP178C switches"
|
||||
select SWCONFIG
|
||||
|
||||
+config AR8216_PHY
|
||||
+ tristate "Driver for Atheros AR8216 switches"
|
||||
+ select SWCONFIG
|
||||
+
|
||||
config FIXED_PHY
|
||||
bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
||||
depends on PHYLIB=y
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -16,6 +16,7 @@ obj-$(CONFIG_ICPLUS_PHY) += icplus.o
|
||||
obj-$(CONFIG_ADM6996_PHY) += adm6996.o
|
||||
obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
|
||||
obj-$(CONFIG_IP175C_PHY) += ip175c.o
|
||||
+obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_FIXED_PHY) += fixed.o
|
||||
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
|
23
target/linux/generic-2.6/patches-2.6.29/680-phy_ar8216.patch
Normal file
23
target/linux/generic-2.6/patches-2.6.29/680-phy_ar8216.patch
Normal file
|
@ -0,0 +1,23 @@
|
|||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -84,6 +84,10 @@ config IP175C_PHY
|
||||
tristate "Driver for IC+ IP175C/IP178C switches"
|
||||
select SWCONFIG
|
||||
|
||||
+config AR8216_PHY
|
||||
+ tristate "Driver for Atheros AR8216 switches"
|
||||
+ select SWCONFIG
|
||||
+
|
||||
config FIXED_PHY
|
||||
bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
||||
depends on PHYLIB=y
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -16,6 +16,7 @@ obj-$(CONFIG_ICPLUS_PHY) += icplus.o
|
||||
obj-$(CONFIG_ADM6996_PHY) += adm6996.o
|
||||
obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
|
||||
obj-$(CONFIG_IP175C_PHY) += ip175c.o
|
||||
+obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_FIXED_PHY) += fixed.o
|
||||
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
|
23
target/linux/generic-2.6/patches-2.6.30/680-phy_ar8216.patch
Normal file
23
target/linux/generic-2.6/patches-2.6.30/680-phy_ar8216.patch
Normal file
|
@ -0,0 +1,23 @@
|
|||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -84,6 +84,10 @@ config IP175C_PHY
|
||||
tristate "Driver for IC+ IP175C/IP178C switches"
|
||||
select SWCONFIG
|
||||
|
||||
+config AR8216_PHY
|
||||
+ tristate "Driver for Atheros AR8216 switches"
|
||||
+ select SWCONFIG
|
||||
+
|
||||
config FIXED_PHY
|
||||
bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
|
||||
depends on PHYLIB=y
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -16,6 +16,7 @@ obj-$(CONFIG_ICPLUS_PHY) += icplus.o
|
||||
obj-$(CONFIG_ADM6996_PHY) += adm6996.o
|
||||
obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
|
||||
obj-$(CONFIG_IP175C_PHY) += ip175c.o
|
||||
+obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_FIXED_PHY) += fixed.o
|
||||
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
|
Loading…
Reference in a new issue