add preliminary support for Storm SL3512 based devices, not ready yet

SVN-Revision: 10956
This commit is contained in:
Imre Kaloz 2008-04-27 17:03:01 +00:00
parent 261802269d
commit a4dd1adf4a
15 changed files with 38875 additions and 0 deletions

View file

@ -48,6 +48,9 @@ endif
ifeq ($(ARCH),powerpc)
HAL_TARGET:=powerpc-be-elf
endif
ifeq ($(BOARD),storm)
HAL_TARGET:=armv4-le-elf
endif
ifneq ($(CONFIG_TARGET_atheros),)
BUS:=AHB

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@ -0,0 +1,28 @@
#
# Copyright (C) 2006-2008 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=arm
BOARD:=storm
BOARDNAME:=Storm SL3512
FEATURES:=squashfs pci broken
LINUX_VERSION:=2.6.23.16
include $(INCLUDE_DIR)/target.mk
define Target/Description
Build images for boards based on the Storm Semiconductor SL3512, eg. Wiligear WBD-111
endef
define Kernel/Configure
$(call Kernel/Configure/Default)
$(SED) 's,.*CONFIG_AEABI.*,$(if $(CONFIG_EABI_SUPPORT),CONFIG_AEABI=y,# CONFIG_AEABI is not set),' $(LINUX_DIR)/.config
$(if $(CONFIG_EABI_SUPPORT),echo '# CONFIG_OABI_COMPAT is not set' >> $(LINUX_DIR)/.config)
endef
$(eval $(call BuildTarget))

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@ -0,0 +1,358 @@
# CONFIG_AEABI is not set
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CLPS7500 is not set
# CONFIG_ARCH_CO285 is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_IMX is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_OMAP is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_SHARK is not set
CONFIG_ARCH_SL2312=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_ARCH_VERSATILE is not set
CONFIG_ARM=y
# CONFIG_ARPD is not set
# CONFIG_ARTHUR is not set
# CONFIG_ATM is not set
CONFIG_BASE_SMALL=0
# CONFIG_BINFMT_AOUT is not set
CONFIG_BITREVERSE=y
# CONFIG_BLK_DEV is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_BONDING is not set
CONFIG_BOUNCE=y
CONFIG_BRIDGE=m
CONFIG_BRIDGE_NETFILTER=y
# CONFIG_BRIDGE_NF_EBTABLES is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_BT is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_CIFS is not set
# CONFIG_CLS_U32_PERF is not set
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttySL0,19200 init=/etc/preinit mem=32M loglevel=8"
# CONFIG_CONFIGFS_FS is not set
CONFIG_CPU_32=y
CONFIG_CPU_32v4=y
CONFIG_CPU_ABRT_EV4=y
CONFIG_CPU_CACHE_FA=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FA=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_FA526=y
CONFIG_CPU_FA_BTB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
CONFIG_CPU_TLB_FA=y
# CONFIG_CRC_ITU_T is not set
# CONFIG_CRYPTO is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_INFO is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_LL is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_SHIRQ is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_IOSCHED="noop"
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_DETECT_SOFTLOCKUP is not set
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_ELF_CORE=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPOLL is not set
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_FORCED_INLINING=y
# CONFIG_FPE_FASTFPE is not set
# CONFIG_FPE_NWFPE is not set
CONFIG_FRAME_POINTER=y
# CONFIG_FUTEX is not set
# CONFIG_FW_LOADER is not set
CONFIG_GEMINI_GPIO_DEV=y
# CONFIG_GEMINI_IPI is not set
# CONFIG_GENERIC_CLOCKEVENTS is not set
# CONFIG_GENERIC_GPIO is not set
# CONFIG_GENERIC_TIME is not set
# CONFIG_HAMRADIO is not set
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_HFSPLUS_FS is not set
# CONFIG_HFS_FS is not set
CONFIG_HW_RANDOM=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
# CONFIG_IEEE80211 is not set
# CONFIG_IFB is not set
# CONFIG_IKCONFIG is not set
# CONFIG_IMQ is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_DIAG is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IPSEC_NAT_TRAVERSAL is not set
# CONFIG_IPV6 is not set
CONFIG_IP_MROUTE=y
# CONFIG_IP_NF_ARPTABLES is not set
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MANGLE=m
# CONFIG_IP_NF_MATCH_AH is not set
# CONFIG_IP_NF_MATCH_ECN is not set
# CONFIG_IP_NF_MATCH_IPP2P is not set
# CONFIG_IP_NF_MATCH_OWNER is not set
# CONFIG_IP_NF_MATCH_RECENT is not set
# CONFIG_IP_NF_MATCH_TIME is not set
# CONFIG_IP_NF_MATCH_TOS is not set
# CONFIG_IP_NF_MATCH_TTL is not set
# CONFIG_IP_NF_QUEUE is not set
# CONFIG_IP_NF_SET is not set
# CONFIG_IP_NF_TARGET_ECN is not set
# CONFIG_IP_NF_TARGET_IMQ is not set
# CONFIG_IP_NF_TARGET_LOG is not set
# CONFIG_IP_NF_TARGET_REJECT is not set
# CONFIG_IP_NF_TARGET_ROUTE is not set
# CONFIG_IP_NF_TARGET_TOS is not set
# CONFIG_IP_NF_TARGET_TTL is not set
# CONFIG_IP_NF_TARGET_ULOG is not set
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
# CONFIG_ISDN is not set
# CONFIG_ISO9660_FS is not set
# CONFIG_JFFS2_RTIME is not set
# CONFIG_JFFS2_SUMMARY is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_KMOD=y
CONFIG_LLC=m
# CONFIG_LLC2 is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_MINIX_FS is not set
# CONFIG_MINI_FO is not set
# CONFIG_MISC_DEVICES is not set
# CONFIG_MSDOS_FS is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_AFS_PARTS is not set
# CONFIG_MTD_ARM_INTEGRATOR is not set
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_I1=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
CONFIG_MTD_CFI_NOSWAP=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
# CONFIG_MTD_OTP is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
CONFIG_MTD_REDBOOT_PARTS=y
# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ROOTFS_ROOT_DEV is not set
# CONFIG_MTD_ROOTFS_SPLIT is not set
# CONFIG_MTD_SERIAL is not set
CONFIG_MTD_SL2312_CFI=y
# CONFIG_MTD_SL2312_SERIAL_ATMEL is not set
# CONFIG_MTD_SL2312_SERIAL_ST is not set
# CONFIG_MTD_SLRAM is not set
CONFIG_NETFILTER_XTABLES=m
# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
# CONFIG_NETFILTER_XT_MATCH_MAC is not set
# CONFIG_NETFILTER_XT_MATCH_MARK is not set
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
# CONFIG_NETFILTER_XT_MATCH_PORTSCAN is not set
# CONFIG_NETFILTER_XT_MATCH_STRING is not set
# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
# CONFIG_NETFILTER_XT_MATCH_U32 is not set
# CONFIG_NETFILTER_XT_TARGET_CHAOS is not set
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
# CONFIG_NETFILTER_XT_TARGET_DELUDE is not set
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
# CONFIG_NETFILTER_XT_TARGET_MARK is not set
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
# CONFIG_NETFILTER_XT_TARGET_TARPIT is not set
# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
# CONFIG_NET_ACT_GACT is not set
# CONFIG_NET_ACT_IPT is not set
# CONFIG_NET_ACT_MIRRED is not set
# CONFIG_NET_ACT_PEDIT is not set
# CONFIG_NET_CLS_RSVP is not set
# CONFIG_NET_CLS_RSVP6 is not set
# CONFIG_NET_EMATCH is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_KEY is not set
# CONFIG_NET_PCI is not set
# CONFIG_NET_PKTGEN is not set
# CONFIG_NET_SCH_DSMARK is not set
# CONFIG_NET_SCH_ESFQ is not set
# CONFIG_NET_SCH_GRED is not set
# CONFIG_NET_SCH_HFSC is not set
# CONFIG_NET_SCH_HTB is not set
# CONFIG_NET_SCH_INGRESS is not set
# CONFIG_NET_SCH_PRIO is not set
# CONFIG_NET_SCH_RED is not set
# CONFIG_NET_SCH_RR is not set
# CONFIG_NET_SCH_SFQ is not set
# CONFIG_NET_SCH_TBF is not set
# CONFIG_NET_SCH_TEQL is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_NFSD is not set
# CONFIG_NFS_FS is not set
# CONFIG_NF_CONNTRACK is not set
# CONFIG_NF_CONNTRACK_ENABLED is not set
# CONFIG_NLS is not set
# CONFIG_NO_IDLE_HZ is not set
# CONFIG_NO_IOPORT is not set
# CONFIG_NVRAM is not set
# CONFIG_OUTER_CACHE is not set
CONFIG_PACKET=m
# CONFIG_PARTITION_ADVANCED is not set
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_PCI_DEBUG is not set
CONFIG_PCI_SYSCALL=y
# CONFIG_PPP is not set
CONFIG_PRINTK_TIME=y
# CONFIG_PROVE_LOCKING is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RTC_LIB=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_SL2312=y
CONFIG_SERIAL_SL2312_CONSOLE=y
# CONFIG_SHMEM is not set
# CONFIG_SL2312_LPC is not set
# CONFIG_SL2312_SHARE_PIN is not set
# CONFIG_SL2312_USB is not set
CONFIG_SL3516_ASIC=y
# CONFIG_SMC91X is not set
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_SOUND is not set
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4096
# CONFIG_STANDALONE is not set
# CONFIG_SWAP is not set
# CONFIG_SYN_COOKIES is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_SYSVIPC is not set
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
# CONFIG_TICK_ONESHOT is not set
# CONFIG_TIMER_STATS is not set
CONFIG_TINY_SHMEM=y
# CONFIG_TUN is not set
# CONFIG_UDF_FS is not set
CONFIG_UID16=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_USER_NS is not set
CONFIG_VECTORS_BASE=0xffff0000
# CONFIG_VFAT_FS is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_DEV is not set
CONFIG_VLAN_8021Q=m
# CONFIG_WLAN_80211 is not set
# CONFIG_XFRM_USER is not set
# CONFIG_XFS_FS is not set
# CONFIG_XIP_KERNEL is not set
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0

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@ -0,0 +1,41 @@
#
# Copyright (C) 2007 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Image/Prepare
cp $(LINUX_DIR)/arch/arm/boot/zImage $(KDIR)/zImage
endef
define Image/BuildKernel
cp $(KDIR)/zImage $(BIN_DIR)/openwrt-$(BOARD)-zImage
#
# XXX - FIXME
#
# BIN_DIR=$(BIN_DIR) $(TOPDIR)/scripts/arm-magic.sh
endef
define Image/Build
$(call Image/Build/$(1),$(1))
endef
define Image/Build/jffs2-64k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=65536 conv=sync
endef
define Image/Build/jffs2-128k
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=131072 conv=sync
$(call Image/Build/slug,$(1))
endef
define Image/Build/squashfs
$(call prepare_generic_squashfs,$(KDIR)/root.squashfs)
dd if=$(KDIR)/root.$(1) of=$(BIN_DIR)/openwrt-$(BOARD)-$(1).img bs=131072 conv=sync
$(call Image/Build/slug,$(1))
endef
$(eval $(call BuildImage))

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@ -0,0 +1,13 @@
Index: linux-2.6.x/include/asm-arm/arch-sl2312/sl351x_gmac.h
===================================================================
--- linux-2.6.x.orig/include/asm-arm/arch-sl2312/sl351x_gmac.h 2007-09-04 14:18:28.540865746 +0300
+++ linux-2.6.x/include/asm-arm/arch-sl2312/sl351x_gmac.h 2007-09-04 14:15:55.584200244 +0300
@@ -21,7 +21,7 @@
#undef BIG_ENDIAN
#define BIG_ENDIAN 0
#define GMAC_DEBUG 1
-#define GMAC_NUM 2
+#define GMAC_NUM 1
//#define L2_jumbo_frame 1
#define _PACKED_ __attribute__ ((aligned(1), packed))

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@ -0,0 +1,83 @@
Index: linux-2.6.23.16/drivers/net/sl351x_gmac.c
===================================================================
--- linux-2.6.23.16.orig/drivers/net/sl351x_gmac.c 2008-03-15 16:59:23.361457295 +0200
+++ linux-2.6.23.16/drivers/net/sl351x_gmac.c 2008-03-15 17:00:32.365389612 +0200
@@ -68,9 +68,11 @@
#include <linux/ip.h>
#endif
+/* Enables NAPI unconditionally */
+#define CONFIG_SL_NAPI 1
+
// #define SL351x_TEST_WORKAROUND
#ifdef CONFIG_SL351x_NAT
-#define CONFIG_SL_NAPI 1
#endif
#define GMAX_TX_INTR_DISABLED 1
#define DO_HW_CHKSUM 1
@@ -124,12 +126,17 @@
*************************************************************/
static int gmac_initialized = 0;
TOE_INFO_T toe_private_data;
-//static int do_again = 0;
+static int do_again = 0;
spinlock_t gmac_fq_lock;
unsigned int FLAG_SWITCH;
static unsigned int next_tick = 3 * HZ;
-static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {{0x00,0x11,0x11,0x87,0x87,0x87}, {0x00,0x22,0x22,0xab,0xab,0xab}};
+static unsigned char eth_mac[CONFIG_MAC_NUM][6]= {
+ {0x00,0x11,0x11,0x87,0x87,0x87},
+#if GMAC_NUM != 1
+ {0x00,0x22,0x22,0xab,0xab,0xab}
+#endif
+};
#undef CONFIG_SL351x_RXTOE
extern NAT_CFG_T nat_cfg;
@@ -2443,7 +2450,8 @@
toe = (TOE_INFO_T *)&toe_private_data;
// handle NAPI
#ifdef CONFIG_SL_NAPI
-if (storlink_ctl.pauseoff == 1)
+ /* XXX: check this, changed from 'storlink_ctl.pauseoff == 1' to if (1) */
+if (1)
{
/* disable GMAC interrupt */
//toe_gmac_disable_interrupt(tp->irq);
@@ -2530,7 +2538,7 @@
{
if (likely(netif_rx_schedule_prep(dev)))
{
- unsigned int data32;
+ // unsigned int data32;
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
@@ -2563,7 +2571,7 @@
{
if (likely(netif_rx_schedule_prep(dev)))
{
- unsigned int data32;
+ // unsigned int data32;
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
@@ -4217,7 +4225,7 @@
GMAC_INFO_T *tp = (GMAC_INFO_T *)dev->priv;
unsigned int status4;
volatile DMA_RWPTR_T fq_rwptr;
- int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
+ // int max_cnt = TOE_SW_FREEQ_DESC_NUM;//TOE_SW_FREEQ_DESC_NUM = 64
//unsigned long rx_old_bytes;
struct net_device_stats *isPtr = (struct net_device_stats *)&tp->ifStatics;
//unsigned long long rx_time;
@@ -4479,7 +4487,7 @@
if (rwptr.bits.rptr == rwptr.bits.wptr)
{
- unsigned int data32;
+ // unsigned int data32;
//printk("%s:---[rwptr.bits.rptr == rwptr.bits.wptr] rx_pkts_num=%d------rwptr.bits.rptr=0x%x------->Default_Q [rwptr.bits.rptr(SW)=0x%x, rwptr.bits.wptr(HW) = 0x%x ]---->Free_Q(SW_HW) = 0x%8x \n",__func__,rx_pkts_num,rwptr.bits.rptr,rwptr.bits.rptr,rwptr.bits.wptr,fq_rwptr.bits32 );
/* Receive descriptor is empty now */

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@ -0,0 +1,250 @@
Index: linux-2.6.23.16/drivers/net/sl351x_gmac.c
===================================================================
--- linux-2.6.23.16.orig/drivers/net/sl351x_gmac.c 2008-03-15 17:00:32.365389612 +0200
+++ linux-2.6.23.16/drivers/net/sl351x_gmac.c 2008-03-15 17:00:55.366700383 +0200
@@ -127,6 +127,7 @@
static int gmac_initialized = 0;
TOE_INFO_T toe_private_data;
static int do_again = 0;
+static int rx_poll_enabled;
spinlock_t gmac_fq_lock;
unsigned int FLAG_SWITCH;
@@ -1065,7 +1066,8 @@
tp->intr3_enabled = 0xffffffff;
tp->intr4_selected = GMAC0_INT_BITS | CLASS_RX_FULL_INT_BITS |
HWFQ_EMPTY_INT_BIT | SWFQ_EMPTY_INT_BIT;
- tp->intr4_enabled = GMAC0_INT_BITS | SWFQ_EMPTY_INT_BIT;
+ tp->intr4_enabled = GMAC0_INT_BITS | SWFQ_EMPTY_INT_BIT| GMAC0_RX_OVERRUN_INT_BIT;
+ // GMAC0_TX_PAUSE_OFF_INT_BIT| GMAC0_MIB_INT_BIT;
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG) & ~tp->intr0_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
@@ -1115,7 +1117,7 @@
tp->intr3_enabled |= 0xffffffff;
tp->intr4_selected |= CLASS_RX_FULL_INT_BITS |
HWFQ_EMPTY_INT_BIT | SWFQ_EMPTY_INT_BIT;
- tp->intr4_enabled |= SWFQ_EMPTY_INT_BIT;
+ tp->intr4_enabled |= SWFQ_EMPTY_INT_BIT | GMAC1_RX_OVERRUN_INT_BIT;
}
data = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG) | tp->intr0_selected;
writel(data, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
@@ -2408,7 +2410,7 @@
// unsigned short max_cnt=TOE_SW_FREEQ_DESC_NUM>>1;
fq_rwptr.bits32 = readl(TOE_GLOBAL_BASE + GLOBAL_SWFQ_RWPTR_REG);
- spin_lock_irqsave(&gmac_fq_lock, flags);
+ // spin_lock_irqsave(&gmac_fq_lock, flags);
//while ((max_cnt--) && (unsigned short)RWPTR_ADVANCE_ONE(fq_rwptr.bits.wptr,
// TOE_SW_FREEQ_DESC_NUM) != fq_rwptr.bits.rptr) {
while ((unsigned short)RWPTR_ADVANCE_ONE(fq_rwptr.bits.wptr,
@@ -2428,10 +2430,47 @@
SET_WPTR(TOE_GLOBAL_BASE+GLOBAL_SWFQ_RWPTR_REG, fq_rwptr.bits.wptr);
toe_private_data.fq_rx_rwptr.bits32 = fq_rwptr.bits32;
}
- spin_unlock_irqrestore(&gmac_fq_lock, flags);
+ // spin_unlock_irqrestore(&gmac_fq_lock, flags);
}
// EXPORT_SYMBOL(toe_gmac_fill_free_q);
+static void gmac_registers(const char *message)
+{
+ unsigned int status0;
+ unsigned int status1;
+ unsigned int status2;
+ unsigned int status3;
+ unsigned int status4;
+
+ printk("%s\n", message);
+
+ status0 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_STATUS_0_REG);
+ status1 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_STATUS_1_REG);
+ status2 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_STATUS_2_REG);
+ status3 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_STATUS_3_REG);
+ status4 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_STATUS_4_REG);
+
+ printk("status: s0:%08X, s1:%08X, s2:%08X, s3:%08X, s4:%08X\n",
+ status0, status1, status2, status3, status4);
+
+ status0 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_0_REG);
+ status1 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+ status2 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_2_REG);
+ status3 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_3_REG);
+ status4 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+
+ printk("mask : s0:%08X, s1:%08X, s2:%08X, s3:%08X, s4:%08X\n",
+ status0, status1, status2, status3, status4);
+
+ status0 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_0_REG);
+ status1 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_1_REG);
+ status2 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_2_REG);
+ status3 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_3_REG);
+ status4 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+
+ printk("select: s0:%08X, s1:%08X, s2:%08X, s3:%08X, s4:%08X\n",
+ status0, status1, status2, status3, status4);
+}
/*----------------------------------------------------------------------
* toe_gmac_interrupt
*----------------------------------------------------------------------*/
@@ -2492,6 +2531,7 @@
writel(status3 & tp->intr3_enabled, TOE_GLOBAL_BASE+GLOBAL_INTERRUPT_STATUS_3_REG);
if (status4)
writel(status4 & tp->intr4_enabled, TOE_GLOBAL_BASE+GLOBAL_INTERRUPT_STATUS_4_REG);
+
#if 0
/* handle freeq interrupt first */
if (status4 & tp->intr4_enabled) {
@@ -2536,10 +2576,31 @@
}
if (netif_running(dev) && (status1 & DEFAULT_Q0_INT_BIT) && (tp->intr1_enabled & DEFAULT_Q0_INT_BIT))
{
- if (likely(netif_rx_schedule_prep(dev)))
+ if (!rx_poll_enabled && likely(netif_rx_schedule_prep(dev)))
{
- // unsigned int data32;
- // disable GMAC-0 rx interrupt
+ unsigned int data32;
+
+ if (rx_poll_enabled)
+ gmac_registers("check #1");
+
+ BUG_ON(rx_poll_enabled == 1);
+
+#if 0
+ /* Masks GMAC-0 rx interrupt */
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+ data32 &= ~(DEFAULT_Q0_INT_BIT);
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+
+ /* Masks GMAC-0 queue empty interrupt */
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+ data32 &= ~DEFAULT_Q0_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+ data32 &= ~DEFAULT_Q0_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+#endif
+
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
//data32 &= ~DEFAULT_Q0_INT_BIT;
@@ -2549,7 +2610,8 @@
//tp->total_q_cnt_napi=0;
//rx_time = jiffies;
//rx_old_bytes = isPtr->rx_bytes;
- __netif_rx_schedule(dev);
+ __netif_rx_schedule(dev);
+ rx_poll_enabled = 1;
}
}
}
@@ -2569,9 +2631,31 @@
if (netif_running(dev) && (status1 & DEFAULT_Q1_INT_BIT) && (tp->intr1_enabled & DEFAULT_Q1_INT_BIT))
{
- if (likely(netif_rx_schedule_prep(dev)))
+ if (!rx_poll_enabled && likely(netif_rx_schedule_prep(dev)))
{
- // unsigned int data32;
+ unsigned int data32;
+
+ if (rx_poll_enabled)
+ gmac_registers("check #2");
+
+ BUG_ON(rx_poll_enabled == 1);
+
+#if 0
+ /* Masks GMAC-1 rx interrupt */
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+ data32 &= ~(DEFAULT_Q1_INT_BIT);
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+
+ /* Masks GMAC-1 queue empty interrupt */
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+ data32 &= ~DEFAULT_Q1_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+ data32 &= ~DEFAULT_Q1_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+#endif
+
// disable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
@@ -2583,9 +2667,13 @@
//rx_time = jiffies;
//rx_old_bytes = isPtr->rx_bytes;
__netif_rx_schedule(dev);
+ rx_poll_enabled = 1;
}
}
}
+ } else {
+
+ gmac_registers("check #3");
}
// Interrupt Status 0
@@ -3306,8 +3394,10 @@
SET_RPTR(&tp->default_qhdr->word1, rwptr.bits.rptr);
tp->rx_rwptr.bits32 = rwptr.bits32;
- toe_gmac_fill_free_q();
}
+
+ /* Handles first available packets only then refill the queue. */
+ toe_gmac_fill_free_q();
}
/*----------------------------------------------------------------------
@@ -4217,6 +4307,7 @@
GMAC_RXDESC_T *curr_desc;
struct sk_buff *skb;
DMA_RWPTR_T rwptr;
+ unsigned int data32;
unsigned int pkt_size;
unsigned int desc_count;
unsigned int good_frame, chksum_status, rx_status;
@@ -4231,7 +4322,7 @@
//unsigned long long rx_time;
-
+ BUG_ON(rx_poll_enabled == 0);
#if 1
if (do_again)
{
@@ -4516,6 +4607,30 @@
#endif
//toe_gmac_fill_free_q();
netif_rx_complete(dev);
+
+ rx_poll_enabled = 0;
+
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+ if (tp->port_id == 0)
+ data32 |= DEFAULT_Q0_INT_BIT;
+ else
+ data32 |= DEFAULT_Q1_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);
+
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+ if (tp->port_id == 0)
+ data32 |= DEFAULT_Q0_INT_BIT;
+ else
+ data32 |= DEFAULT_Q1_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_4_REG);
+
+ data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+ if (tp->port_id == 0)
+ data32 |= DEFAULT_Q0_INT_BIT;
+ else
+ data32 |= DEFAULT_Q1_INT_BIT;
+ writel(data32, TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_SELECT_4_REG);
+
// enable GMAC-0 rx interrupt
// class-Q & TOE-Q are implemented in future
//data32 = readl(TOE_GLOBAL_BASE + GLOBAL_INTERRUPT_ENABLE_1_REG);

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

File diff suppressed because it is too large Load diff

View file

@ -0,0 +1,390 @@
Index: linux-2.6.23.16/drivers/char/gemini_gpio_dev.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.23.16/drivers/char/gemini_gpio_dev.c 2008-03-15 17:05:28.382258620 +0200
@@ -0,0 +1,356 @@
+/*
+ * GPIO driver for Gemini board
+ * Provides /dev/gpio
+ */
+
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <linux/fcntl.h>
+#include <linux/miscdevice.h>
+#include <asm/uaccess.h> /* copy_to_user, copy_from_user */
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/arch/sl2312.h>
+#include <asm/arch/irqs.h>
+#include <asm/arch/gemini_gpio.h>
+
+#define GEMINI_GPIO_BASE1 IO_ADDRESS(SL2312_GPIO_BASE)
+#define GEMINI_GPIO_BASE2 IO_ADDRESS(SL2312_GPIO_BASE1)
+
+#define GPIO_SET 2
+#define MAX_GPIO_LINE 32*GPIO_SET
+
+wait_queue_head_t gemini_gpio_wait[MAX_GPIO_LINE];
+
+enum GPIO_REG
+{
+ GPIO_DATA_OUT = 0x00,
+ GPIO_DATA_IN = 0x04,
+ GPIO_PIN_DIR = 0x08,
+ GPIO_BY_PASS = 0x0C,
+ GPIO_DATA_SET = 0x10,
+ GPIO_DATA_CLEAR = 0x14,
+ GPIO_PULL_ENABLE = 0x18,
+ GPIO_PULL_TYPE = 0x1C,
+ GPIO_INT_ENABLE = 0x20,
+ GPIO_INT_RAW_STATUS = 0x24,
+ GPIO_INT_MASK_STATUS = 0x28,
+ GPIO_INT_MASK = 0x2C,
+ GPIO_INT_CLEAR = 0x30,
+ GPIO_INT_TRIG = 0x34,
+ GPIO_INT_BOTH = 0x38,
+ GPIO_INT_POLAR = 0x3C
+};
+
+unsigned int regist_gpio_int0=0,regist_gpio_int1=0;
+
+/* defines a specific GPIO bit number and state */
+struct gpio_bit {
+ unsigned char bit;
+ unsigned char state;
+};
+
+#define GPIO_MAJOR 10
+#define GPIO_MINOR 127
+
+/*
+ * ioctl calls that are permitted to the /dev/gpio interface
+ */
+#define GPIO_GET_BIT 0x0000001
+#define GPIO_SET_BIT 0x0000002
+#define GPIO_GET_CONFIG 0x0000003
+#define GPIO_SET_CONFIG 0x0000004
+
+//#define GPIO_CONFIG_OUT 1
+//#define GPIO_CONFIG_IN 2
+
+
+
+#define DEVICE_NAME "gpio"
+
+//#define DEBUG
+
+/*
+ * GPIO interface
+ */
+
+/* /dev/gpio */
+static int gpio_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg);
+
+/* /proc/driver/gpio */
+static int gpio_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data);
+
+static unsigned char gpio_status; /* bitmapped status byte. */
+
+/* functions for set/get gpio lines on storlink cpu */
+
+void gpio_line_get(unsigned char pin, u32 * data)
+{
+ unsigned int set = pin >>5; // each GPIO set has 32 pins
+ unsigned int status,addr;
+
+ addr = (set ? GEMINI_GPIO_BASE2:GEMINI_GPIO_BASE1) + GPIO_DATA_IN;
+ status = readl(addr);
+#ifdef DEBUG
+ printk("status = %08X, pin = %d, set = %d\n", status, pin, set);
+#endif
+ if (set)
+ *data = (status&(1<<(pin-32)))?1:0;
+ else
+ *data = (status&(1<<pin))?1:0;
+}
+
+void gpio_line_set(unsigned char pin, u32 high)
+{
+ unsigned char set = pin >>5; // each GPIO set has 32 pins
+ unsigned int status=0,addr;
+
+ addr = (set ? GEMINI_GPIO_BASE2:GEMINI_GPIO_BASE1)+(high?GPIO_DATA_SET:GPIO_DATA_CLEAR);
+
+ status &= ~(1 << (pin %32));
+ status |= (1 << (pin % 32));
+ writel(status,addr);
+}
+
+/*
+ * pin = [0..63]
+ * mode =
+ * 1 -- OUT
+ * 2 -- IN
+ */
+void gpio_line_config(unsigned char pin, unsigned char mode)
+{
+ unsigned char set = pin >>5; // each GPIO set has 32 pins
+ unsigned int status,addr;
+
+ addr = (set ? GEMINI_GPIO_BASE2:GEMINI_GPIO_BASE1)+GPIO_PIN_DIR;
+ status = readl(addr);
+
+ status &= ~(1 << (pin %32));
+ if (mode == 1)
+ status |= (1 << (pin % 32)); /* PinDir: 0 - input, 1 - output */
+
+ writel(status,addr);
+#if 0
+ /* enable pullup-high if mode is input */
+
+ addr = (set ? GEMINI_GPIO_BASE2:GEMINI_GPIO_BASE1)+GPIO_PULL_ENABLE;
+ status = readl(addr);
+
+ status &= ~(1 << (pin %32));
+ if (mode == 2) /* input */
+ status |= (1 << (pin % 32)); /* PullEnable: 0 - disable, 1 - enable */
+
+ writel(status,addr);
+
+ addr = (set ? GEMINI_GPIO_BASE2:GEMINI_GPIO_BASE1)+GPIO_PULL_TYPE;
+ status = readl(addr);
+
+ status &= ~(1 << (pin %32));
+ if (mode == 2) /* input */
+ status |= (1 << (pin % 32)); /* PullType: 0 - low, 1 - high */
+
+ writel(status,addr);
+#endif
+}
+
+#define GPIO_IS_OPEN 0x01 /* means /dev/gpio is in use */
+
+/*
+ * Now all the various file operations that we export.
+ */
+static int gpio_ioctl(struct inode *inode, struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ struct gpio_bit bit;
+ u32 val;
+
+ if (copy_from_user(&bit, (struct gpio_bit *)arg,
+ sizeof(bit)))
+ return -EFAULT;
+
+ switch (cmd) {
+
+ case GPIO_GET_BIT:
+ gpio_line_get(bit.bit, &val);
+ bit.state = val;
+ return copy_to_user((void *)arg, &bit, sizeof(bit)) ? -EFAULT : 0;
+ case GPIO_SET_BIT:
+ val = bit.state;
+ gpio_line_set(bit.bit, val);
+ return 0;
+ case GPIO_GET_CONFIG:
+ // gpio_line_config(bit.bit, bit.state);
+ return copy_to_user((void *)arg, &bit, sizeof(bit)) ? -EFAULT : 0;
+ case GPIO_SET_CONFIG:
+ val = bit.state;
+ gpio_line_config(bit.bit, bit.state);
+ return 0;
+ }
+ return -EINVAL;
+}
+
+
+static int gpio_open(struct inode *inode, struct file *file)
+{
+ if (gpio_status & GPIO_IS_OPEN)
+ return -EBUSY;
+
+ gpio_status |= GPIO_IS_OPEN;
+ return 0;
+}
+
+
+static int gpio_release(struct inode *inode, struct file *file)
+{
+ /*
+ * Turn off all interrupts once the device is no longer
+ * in use and clear the data.
+ */
+
+ gpio_status &= ~GPIO_IS_OPEN;
+ return 0;
+}
+
+
+/*
+ * The various file operations we support.
+ */
+
+static struct file_operations gpio_fops = {
+ .owner = THIS_MODULE,
+ .ioctl = gpio_ioctl,
+ .open = gpio_open,
+ .release = gpio_release,
+};
+
+static struct miscdevice gpio_dev =
+{
+ .minor = GPIO_MINOR,
+ .name = "gpio",
+ .fops = &gpio_fops,
+};
+
+
+
+
+#ifdef CONFIG_PROC_FS
+static struct proc_dir_entry *dir;
+
+/*
+ * Info exported via "/proc/driver/gpio".
+ */
+static int gpio_get_status(char *buf)
+{
+ char *p = buf;
+ u32 val = 0;
+ int i;
+ int bit;
+#ifdef DEBUG
+ u32 addr;
+
+ for (i = 0; i < 0x20; i+=4 ) {
+ addr = IO_ADDRESS(SL2312_GPIO_BASE) + i;
+ val = readl(addr);
+ p+=sprintf(p, "GPIO0: 0x%02X: %08X\n", i, val );
+ }
+ for (i = 0; i < 0x20; i+=4 ) {
+ addr = IO_ADDRESS(SL2312_GPIO_BASE1) + i;
+ val = readl(addr);
+ p+=sprintf(p, "GPIO1: 0x%02X: %08X\n", i, val );
+ }
+#endif
+
+ for (i = 0; i < 32; i++) {
+ gpio_line_get(i, &bit);
+ if (bit)
+ val |= (1 << i);
+ }
+ p += sprintf(p, "gpio0\t: 0x%08x\n", val);
+
+ val = 0;
+ for (i = 32; i < 64; i++) {
+ gpio_line_get(i, &bit);
+ if (bit)
+ val |= (1 << i);
+ }
+ p += sprintf(p, "gpio1\t: 0x%08x\n", val);
+
+ return p - buf;
+}
+
+
+/* /proc/driver/gpio read op
+ */
+static int gpio_read_proc(char *page, char **start, off_t off,
+ int count, int *eof, void *data)
+{
+ int len = gpio_get_status (page);
+
+ if (len <= off+count)
+ *eof = 1;
+ *start = page + off;
+ len -= off;
+ if ( len > count )
+ len = count;
+ if ( len < 0 )
+ len = 0;
+ return len;
+}
+#endif /* CONFIG_PROC_FS */
+
+
+static int __init gpio_init_module(void)
+{
+ int retval;
+#ifdef CONFIG_PROC_FS
+ struct proc_dir_entry *res;
+#endif
+
+ /* register /dev/gpio file ops */
+ //retval = register_chrdev(GPIO_MAJOR, DEVICE_NAME, &gpio_fops);
+ retval = misc_register(&gpio_dev);
+ if(retval < 0)
+ return retval;
+
+#ifdef CONFIG_PROC_FS
+ dir = proc_mkdir("driver/gpio", NULL);
+ if (!dir) {
+ misc_deregister(&gpio_dev);
+ return -ENOMEM;
+ }
+ /* register /proc/driver/gpio */
+ res = create_proc_entry("info", 0644, dir);
+ if (res) {
+ res->read_proc= gpio_read_proc;
+ } else {
+ misc_deregister(&gpio_dev);
+ return -ENOMEM;
+ }
+#endif
+
+ printk("%s: GPIO driver loaded\n", __FILE__);
+
+ return 0;
+}
+
+static void __exit gpio_cleanup_module(void)
+{
+ remove_proc_entry ("info", dir);
+ misc_deregister(&gpio_dev);
+
+ printk("%s: GPIO driver unloaded\n", __FILE__);
+}
+
+module_init(gpio_init_module);
+module_exit(gpio_cleanup_module);
+
+MODULE_AUTHOR("Jonas Majauskas");
+MODULE_LICENSE("GPL");
+
Index: linux-2.6.23.16/drivers/char/Kconfig
===================================================================
--- linux-2.6.23.16.orig/drivers/char/Kconfig 2008-03-13 17:45:54.000221290 +0200
+++ linux-2.6.23.16/drivers/char/Kconfig 2008-03-15 17:05:09.381175866 +0200
@@ -1064,5 +1064,12 @@
source "drivers/s390/char/Kconfig"
+config GEMINI_GPIO_DEV
+ tristate "GPIO driver for Gemini board (provides /dev/gpio)"
+ depends on ARCH_SL2312
+ default n
+ help
+ GPIO driver for Gemini boards - SL3512, SL3516.
+
endmenu
Index: linux-2.6.23.16/drivers/char/Makefile
===================================================================
--- linux-2.6.23.16.orig/drivers/char/Makefile 2008-03-15 17:04:35.879266660 +0200
+++ linux-2.6.23.16/drivers/char/Makefile 2008-03-15 17:05:09.381175866 +0200
@@ -115,6 +115,7 @@
obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o
obj-$(CONFIG_TCG_TPM) += tpm/
+obj-$(CONFIG_GEMINI_GPIO_DEV) += gemini_gpio_dev.o
obj-$(CONFIG_PS3_FLASH) += ps3flash.o

View file

@ -85,6 +85,7 @@ config TARGET_OPTIMIZATION
default "-Os -pipe -march=i486 -funit-at-a-time" if TARGET_rdc
default "-Os -pipe -mips32 -mtune=mips32 -funit-at-a-time" if mipsel || mips
default "-Os -pipe -march=armv5te -mtune=xscale -funit-at-a-time" if TARGET_ixp4xx || TARGET_iop32x || TARGET_pxa
default "-Os -pipe -march=armv4t -mtune=arm9tdmi -funit-at-a-time" if TARGET_storm
default "-Os -pipe -funit-at-a-time"
help
Optimizations to use when building for the target host.

View file

@ -0,0 +1,210 @@
#
# Automatically generated make config: don't edit
#
# TARGET_alpha is not set
TARGET_arm=y
# TARGET_avr32 is not set
# TARGET_bfin is not set
# TARGET_cris is not set
# TARGET_e1 is not set
# TARGET_frv is not set
# TARGET_h8300 is not set
# TARGET_hppa is not set
# TARGET_i386 is not set
# TARGET_i960 is not set
# TARGET_ia64 is not set
# TARGET_m68k is not set
# TARGET_microblaze is not set
# TARGET_mips is not set
# TARGET_nios is not set
# TARGET_nios2 is not set
# TARGET_powerpc is not set
# TARGET_sh is not set
# TARGET_sh64 is not set
# TARGET_sparc is not set
# TARGET_v850 is not set
# TARGET_vax is not set
# TARGET_x86_64 is not set
#
# Target Architecture Features and Options
#
TARGET_ARCH="arm"
FORCE_OPTIONS_FOR_ARCH=y
# CONFIG_ARM_OABI is not set
CONFIG_ARM_EABI=y
USE_BX=y
# CONFIG_GENERIC_ARM is not set
# CONFIG_ARM610 is not set
# CONFIG_ARM710 is not set
# CONFIG_ARM7TDMI is not set
# CONFIG_ARM720T is not set
CONFIG_ARM920T=y
# CONFIG_ARM922T is not set
# CONFIG_ARM926T is not set
# CONFIG_ARM10T is not set
# CONFIG_ARM1136JF_S is not set
# CONFIG_ARM1176JZ_S is not set
# CONFIG_ARM1176JZF_S is not set
# CONFIG_ARM_SA110 is not set
# CONFIG_ARM_SA1100 is not set
# CONFIG_ARM_XSCALE is not set
# CONFIG_ARM_IWMMXT is not set
ARCH_ANY_ENDIAN=y
# ARCH_WANTS_BIG_ENDIAN is not set
ARCH_WANTS_LITTLE_ENDIAN=y
ARCH_HAS_MMU=y
ARCH_USE_MMU=y
UCLIBC_HAS_FLOATS=y
UCLIBC_HAS_FPU=y
UCLIBC_HAS_SOFT_FLOAT=y
DO_C99_MATH=y
KERNEL_SOURCE="./toolchain_build_arm/linux"
KERNEL_HEADERS="./toolchain_build_arm/linux/include"
HAVE_DOT_CONFIG=y
#
# General Library Settings
#
# HAVE_NO_PIC is not set
DOPIC=y
# HAVE_NO_SHARED is not set
HAVE_SHARED=y
# ARCH_HAS_NO_LDSO is not set
BUILD_UCLIBC_LDSO=y
# FORCE_SHAREABLE_TEXT_SEGMENTS is not set
LDSO_LDD_SUPPORT=y
LDSO_CACHE_SUPPORT=y
# LDSO_PRELOAD_FILE_SUPPORT is not set
LDSO_BASE_FILENAME="ld.so"
LDSO_RUNPATH=y
# DL_FINI_CRT_COMPAT is not set
UCLIBC_CTOR_DTOR=y
# HAS_NO_THREADS is not set
UCLIBC_HAS_THREADS=y
# PTHREADS_DEBUG_SUPPORT is not set
UCLIBC_HAS_LFS=y
LINUXTHREADS_OLD=y
# UCLIBC_STATIC_LDCONFIG is not set
# MALLOC is not set
# MALLOC_SIMPLE is not set
MALLOC_STANDARD=y
MALLOC_GLIBC_COMPAT=y
UCLIBC_DYNAMIC_ATEXIT=y
COMPAT_ATEXIT=y
# UCLIBC_SUSV3_LEGACY is not set
UCLIBC_SUSV3_LEGACY_MACROS=y
UCLIBC_HAS_SHADOW=y
UCLIBC_HAS_PROGRAM_INVOCATION_NAME=y
UCLIBC_HAS___PROGNAME=y
# UNIX98PTY_ONLY is not set
ASSUME_DEVPTS=y
UCLIBC_HAS_TM_EXTENSIONS=y
UCLIBC_HAS_TZ_CACHING=y
UCLIBC_HAS_TZ_FILE=y
UCLIBC_HAS_TZ_FILE_READ_MANY=y
UCLIBC_TZ_FILE_PATH="/etc/TZ"
#
# Advanced Library Settings
#
UCLIBC_PWD_BUFFER_SIZE=256
UCLIBC_GRP_BUFFER_SIZE=256
#
# Networking Support
#
UCLIBC_HAS_IPV6=y
UCLIBC_HAS_RPC=y
UCLIBC_HAS_FULL_RPC=y
# UCLIBC_HAS_REENTRANT_RPC is not set
# UCLIBC_USE_NETLINK is not set
UCLIBC_HAS_BSD_RES_CLOSE=y
#
# String and Stdio Support
#
UCLIBC_HAS_STRING_GENERIC_OPT=y
UCLIBC_HAS_STRING_ARCH_OPT=y
UCLIBC_HAS_CTYPE_TABLES=y
UCLIBC_HAS_CTYPE_SIGNED=y
# UCLIBC_HAS_CTYPE_UNSAFE is not set
UCLIBC_HAS_CTYPE_CHECKED=y
# UCLIBC_HAS_CTYPE_ENFORCED is not set
UCLIBC_HAS_WCHAR=y
# UCLIBC_HAS_LOCALE is not set
UCLIBC_HAS_HEXADECIMAL_FLOATS=y
UCLIBC_HAS_GLIBC_CUSTOM_PRINTF=y
UCLIBC_PRINTF_SCANF_POSITIONAL_ARGS=9
UCLIBC_HAS_SCANF_GLIBC_A_FLAG=y
# UCLIBC_HAS_STDIO_BUFSIZ_NONE is not set
# UCLIBC_HAS_STDIO_BUFSIZ_256 is not set
# UCLIBC_HAS_STDIO_BUFSIZ_512 is not set
# UCLIBC_HAS_STDIO_BUFSIZ_1024 is not set
# UCLIBC_HAS_STDIO_BUFSIZ_2048 is not set
UCLIBC_HAS_STDIO_BUFSIZ_4096=y
# UCLIBC_HAS_STDIO_BUFSIZ_8192 is not set
UCLIBC_HAS_STDIO_BUILTIN_BUFFER_NONE=y
# UCLIBC_HAS_STDIO_BUILTIN_BUFFER_4 is not set
# UCLIBC_HAS_STDIO_BUILTIN_BUFFER_8 is not set
# UCLIBC_HAS_STDIO_SHUTDOWN_ON_ABORT is not set
UCLIBC_HAS_STDIO_GETC_MACRO=y
UCLIBC_HAS_STDIO_PUTC_MACRO=y
UCLIBC_HAS_STDIO_AUTO_RW_TRANSITION=y
# UCLIBC_HAS_FOPEN_LARGEFILE_MODE is not set
UCLIBC_HAS_FOPEN_EXCLUSIVE_MODE=y
UCLIBC_HAS_GLIBC_CUSTOM_STREAMS=y
UCLIBC_HAS_PRINTF_M_SPEC=y
UCLIBC_HAS_ERRNO_MESSAGES=y
# UCLIBC_HAS_SYS_ERRLIST is not set
UCLIBC_HAS_SIGNUM_MESSAGES=y
# UCLIBC_HAS_SYS_SIGLIST is not set
UCLIBC_HAS_GNU_GETOPT=y
UCLIBC_HAS_GNU_GETSUBOPT=y
#
# Big and Tall
#
UCLIBC_HAS_REGEX=y
UCLIBC_HAS_REGEX_OLD=y
UCLIBC_HAS_FNMATCH=y
UCLIBC_HAS_FNMATCH_OLD=y
UCLIBC_HAS_WORDEXP=y
UCLIBC_HAS_FTW=y
UCLIBC_HAS_GLOB=y
UCLIBC_HAS_GNU_GLOB=y
#
# Library Installation Options
#
SHARED_LIB_LOADER_PREFIX="/lib"
RUNTIME_PREFIX="/"
DEVEL_PREFIX="/usr/"
#
# Security options
#
# UCLIBC_BUILD_PIE is not set
# UCLIBC_HAS_ARC4RANDOM is not set
# HAVE_NO_SSP is not set
# UCLIBC_HAS_SSP is not set
UCLIBC_BUILD_RELRO=y
# UCLIBC_BUILD_NOW is not set
UCLIBC_BUILD_NOEXECSTACK=y
#
# uClibc development/debugging options
#
CROSS_COMPILER_PREFIX=""
UCLIBC_EXTRA_CFLAGS=""
# DODEBUG is not set
# DODEBUG_PT is not set
DOSTRIP=y
# DOASSERTS is not set
# SUPPORT_LD_DEBUG is not set
# SUPPORT_LD_DEBUG_EARLY is not set
# UCLIBC_MALLOC_DEBUGGING is not set
WARNINGS="-Wall"
# EXTRA_WARNINGS is not set
# DOMULTI is not set
# UCLIBC_MJN3_ONLY is not set