bcm63xx: add ethernet support for bcm6368
Add basic support for the internal ethernet switch on bcm6368. It behaves as a dumb switch for now, but allows basic connectivity. Also drop the ethernet patch for bcm6345 for now, it needs rework. SVN-Revision: 31129
This commit is contained in:
parent
0876972850
commit
a2adca6ee9
11 changed files with 2173 additions and 534 deletions
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@ -1,530 +0,0 @@
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -29,16 +29,15 @@
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CKCTL_6338_SAR_EN | \
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CKCTL_6338_SPI_EN)
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-#define CKCTL_6345_CPU_EN (1 << 0)
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-#define CKCTL_6345_BUS_EN (1 << 1)
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-#define CKCTL_6345_EBI_EN (1 << 2)
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-#define CKCTL_6345_UART_EN (1 << 3)
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-#define CKCTL_6345_ADSLPHY_EN (1 << 4)
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-#define CKCTL_6345_ENET_EN (1 << 7)
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-#define CKCTL_6345_USBH_EN (1 << 8)
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+#define CKCTL_6345_CPU_EN (1 << 16)
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+#define CKCTL_6345_BUS_EN (1 << 17)
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+#define CKCTL_6345_EBI_EN (1 << 18)
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+#define CKCTL_6345_UART_EN (1 << 19)
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+#define CKCTL_6345_ADSLPHY_EN (1 << 20)
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+#define CKCTL_6345_ENET_EN (1 << 23)
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+#define CKCTL_6345_USBH_EN (1 << 24)
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-#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_ENET_EN | \
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- CKCTL_6345_USBH_EN | \
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+#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_USBH_EN | \
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CKCTL_6345_ADSLPHY_EN)
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#define CKCTL_6348_ADSLPHY_EN (1 << 0)
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@@ -702,6 +701,39 @@
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#define ENETSW_MIB_REG_COUNT 47
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+/* Broadcom 6345 ENET DMA definitions */
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+#define ENETDMA_6345_CHANCFG_REG(x) (0x00 + (x) * 0x40)
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+#define ENETDMA_6345_CHANCFG_EN_SHIFT 0
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+#define ENETDMA_6345_CHANCFG_EN_MASK (1 << ENETDMA_6345_CHANCFG_EN_SHIFT)
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+#define ENETDMA_6345_PKTHALT_SHIFT 1
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+#define ENETDMA_6345_PKTHALT_MASK (1 << ENETDMA_6345_PKTHALT_SHIFT)
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+#define ENETDMA_6345_CHAINING_SHIFT 2
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+#define ENETDMA_6345_CHAINING_MASK (1 << ENETDMA_6345_CHAINING_SHIFT)
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+#define ENETDMA_6345_WRAP_EN_SHIFT 3
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+#define ENETDMA_6345_WRAP_EN_MASK (1 << ENETDMA_6345_WRAP_EN_SHIFT)
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+#define ENETDMA_6345_FLOWC_EN_SHIFT 4
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+#define ENETDMA_6345_FLOWC_EN_MASK (1 << ENETDMA_6345_FLOWC_EN_SHIFT)
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+
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+#define ENETDMA_6345_MAXBURST_REG(x) (0x04 + (x) * 0x40)
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+
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+#define ENETDMA_6345_RSTART_REG(x) (0x08 + (x) * 0x40)
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+
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+#define ENETDMA_6345_LEN_REG(x) (0x0C + (x) * 0x40)
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+
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+#define ENETDMA_6345_BSTAT_REG(x) (0x10 + (x) * 0x40)
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+
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+#define ENETDMA_6345_IR_REG(x) (0x14 + (x) * 0x40)
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+#define ENETDMA_6345_IR_BUFDONE_MASK (1 << 0)
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+#define ENETDMA_6345_IR_PKTDONE_MASK (1 << 1)
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+#define ENETDMA_6345_IR_NOTOWNER_MASK (1 << 2)
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+
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+#define ENETDMA_6345_IRMASK_REG(x) (0x18 + (x) * 0x40)
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+
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+#define ENETDMA_6345_FC_REG(x) (0x1C + (x) * 0x40)
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+
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+#define ENETDMA_6345_BUFALLOC_REG(x) (0x20 + (x) * 0x40)
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+
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+
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/*************************************************************************
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* _REG relative to RSET_OHCI_PRIV
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*************************************************************************/
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--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
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@@ -32,6 +32,7 @@
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#include <linux/if_vlan.h>
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#include <bcm63xx_dev_enet.h>
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+#include <bcm63xx_cpu.h>
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#include "bcm63xx_enet.h"
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static char bcm_enet_driver_name[] = "bcm63xx_enet";
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@@ -178,6 +179,7 @@ static void bcm_enet_mdio_write_mii(stru
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static int bcm_enet_refill_rx(struct net_device *dev)
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{
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struct bcm_enet_priv *priv;
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+ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
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priv = netdev_priv(dev);
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@@ -206,7 +208,7 @@ static int bcm_enet_refill_rx(struct net
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len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT;
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len_stat |= DMADESC_OWNER_MASK;
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if (priv->rx_dirty_desc == priv->rx_ring_size - 1) {
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- len_stat |= DMADESC_WRAP_MASK;
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+ len_stat |= (DMADESC_WRAP_MASK >> desc_shift);
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priv->rx_dirty_desc = 0;
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} else {
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priv->rx_dirty_desc++;
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@@ -217,7 +219,10 @@ static int bcm_enet_refill_rx(struct net
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priv->rx_desc_count++;
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/* tell dma engine we allocated one buffer */
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- enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ if (!BCMCPU_IS_6345())
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+ enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ else
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+ enet_dma_writel(priv, 1, ENETDMA_6345_BUFALLOC_REG(priv->rx_chan));
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}
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/* If rx ring is still empty, set a timer to try allocating
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@@ -255,6 +260,7 @@ static int bcm_enet_receive_queue(struct
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struct bcm_enet_priv *priv;
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struct device *kdev;
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int processed;
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+ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
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priv = netdev_priv(dev);
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kdev = &priv->pdev->dev;
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@@ -293,7 +299,7 @@ static int bcm_enet_receive_queue(struct
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/* if the packet does not have start of packet _and_
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* end of packet flag set, then just recycle it */
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- if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) {
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+ if ((len_stat & (DMADESC_ESOP_MASK >> desc_shift)) != (DMADESC_ESOP_MASK >> desc_shift)) {
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dev->stats.rx_dropped++;
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continue;
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}
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@@ -353,8 +359,15 @@ static int bcm_enet_receive_queue(struct
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bcm_enet_refill_rx(dev);
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/* kick rx dma */
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- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
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- ENETDMA_CHANCFG_REG(priv->rx_chan));
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+ if (!BCMCPU_IS_6345())
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+ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
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+ ENETDMA_CHANCFG_REG(priv->rx_chan));
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+ else
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+ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
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+ ENETDMA_6345_CHAINING_MASK |
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+ ENETDMA_6345_WRAP_EN_MASK |
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+ ENETDMA_6345_FLOWC_EN_MASK,
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+ ENETDMA_6345_CHANCFG_REG(priv->rx_chan));
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}
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return processed;
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@@ -429,10 +442,21 @@ static int bcm_enet_poll(struct napi_str
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dev = priv->net_dev;
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/* ack interrupts */
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- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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- ENETDMA_IR_REG(priv->rx_chan));
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- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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- ENETDMA_IR_REG(priv->tx_chan));
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+ if (!BCMCPU_IS_6345()) {
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+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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+ ENETDMA_IR_REG(priv->rx_chan));
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+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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+ ENETDMA_IR_REG(priv->tx_chan));
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+ } else {
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+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
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+ ENETDMA_IR_PKTDONE_MASK |
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+ ENETDMA_IR_NOTOWNER_MASK,
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+ ENETDMA_6345_IR_REG(priv->rx_chan));
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+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
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+ ENETDMA_IR_PKTDONE_MASK |
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+ ENETDMA_IR_NOTOWNER_MASK,
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+ ENETDMA_6345_IR_REG(priv->tx_chan));
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+ }
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/* reclaim sent skb */
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tx_work_done = bcm_enet_tx_reclaim(dev, 0);
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@@ -451,10 +475,21 @@ static int bcm_enet_poll(struct napi_str
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napi_complete(napi);
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/* restore rx/tx interrupt */
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- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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- ENETDMA_IRMASK_REG(priv->rx_chan));
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- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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- ENETDMA_IRMASK_REG(priv->tx_chan));
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+ if (!BCMCPU_IS_6345()) {
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+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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+ ENETDMA_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
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+ ENETDMA_IRMASK_REG(priv->tx_chan));
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+ } else {
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+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
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+ ENETDMA_IR_PKTDONE_MASK |
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+ ENETDMA_IR_NOTOWNER_MASK,
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+ ENETDMA_6345_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
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+ ENETDMA_IR_PKTDONE_MASK |
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+ ENETDMA_IR_NOTOWNER_MASK,
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+ ENETDMA_6345_IRMASK_REG(priv->tx_chan));
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+ }
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return rx_work_done;
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}
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@@ -497,8 +532,13 @@ static irqreturn_t bcm_enet_isr_dma(int
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priv = netdev_priv(dev);
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/* mask rx/tx interrupts */
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- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
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- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
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+ if (!BCMCPU_IS_6345()) {
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+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
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+ } else {
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+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
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+ }
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napi_schedule(&priv->napi);
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@@ -514,6 +554,7 @@ static int bcm_enet_start_xmit(struct sk
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struct bcm_enet_desc *desc;
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u32 len_stat;
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int ret;
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+ unsigned int desc_shift = BCMCPU_IS_6345() ? DMADESC_6345_SHIFT : 0;
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priv = netdev_priv(dev);
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@@ -539,14 +580,13 @@ static int bcm_enet_start_xmit(struct sk
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DMA_TO_DEVICE);
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len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK;
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- len_stat |= DMADESC_ESOP_MASK |
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- DMADESC_APPEND_CRC |
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- DMADESC_OWNER_MASK;
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+ len_stat |= ((DMADESC_ESOP_MASK >> desc_shift) |
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+ DMADESC_APPEND_CRC | DMADESC_OWNER_MASK);
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priv->tx_curr_desc++;
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if (priv->tx_curr_desc == priv->tx_ring_size) {
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priv->tx_curr_desc = 0;
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- len_stat |= DMADESC_WRAP_MASK;
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+ len_stat |= (DMADESC_WRAP_MASK >> desc_shift);
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}
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priv->tx_desc_count--;
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@@ -557,8 +597,15 @@ static int bcm_enet_start_xmit(struct sk
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wmb();
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/* kick tx dma */
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- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
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- ENETDMA_CHANCFG_REG(priv->tx_chan));
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+ if (!BCMCPU_IS_6345())
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+ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
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+ ENETDMA_CHANCFG_REG(priv->tx_chan));
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+ else
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+ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
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+ ENETDMA_6345_CHAINING_MASK |
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+ ENETDMA_6345_WRAP_EN_MASK |
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+ ENETDMA_6345_FLOWC_EN_MASK,
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+ ENETDMA_6345_CHANCFG_REG(priv->tx_chan));
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/* stop queue if no more desc available */
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if (!priv->tx_desc_count)
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@@ -686,6 +733,9 @@ static void bcm_enet_set_flow(struct bcm
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val &= ~ENET_RXCFG_ENFLOW_MASK;
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enet_writel(priv, val, ENET_RXCFG_REG);
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+ if (BCMCPU_IS_6345())
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+ return;
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+
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/* tx flow control (pause frame generation) */
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val = enet_dma_readl(priv, ENETDMA_CFG_REG);
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if (tx_en)
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@@ -833,8 +883,13 @@ static int bcm_enet_open(struct net_devi
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/* mask all interrupts and request them */
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enet_writel(priv, 0, ENET_IRMASK_REG);
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- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
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- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
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+ if (!BCMCPU_IS_6345()) {
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+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
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+ } else {
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+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
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+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
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+ }
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ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
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if (ret)
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@@ -913,8 +968,12 @@ static int bcm_enet_open(struct net_devi
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priv->rx_curr_desc = 0;
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/* initialize flow control buffer allocation */
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- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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- ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ if (!BCMCPU_IS_6345())
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+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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+ ENETDMA_BUFALLOC_REG(priv->rx_chan));
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+ else
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+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
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+ ENETDMA_6345_BUFALLOC_REG(priv->rx_chan));
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if (bcm_enet_refill_rx(dev)) {
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dev_err(kdev, "cannot allocate rx skb queue\n");
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@@ -923,37 +982,62 @@ static int bcm_enet_open(struct net_devi
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}
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/* write rx & tx ring addresses */
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- enet_dma_writel(priv, priv->rx_desc_dma,
|
|
||||||
- ENETDMA_RSTART_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, priv->tx_desc_dma,
|
|
||||||
- ENETDMA_RSTART_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, priv->rx_desc_dma,
|
|
||||||
+ ENETDMA_RSTART_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, priv->tx_desc_dma,
|
|
||||||
+ ENETDMA_RSTART_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, priv->rx_desc_dma,
|
|
||||||
+ ENETDMA_6345_RSTART_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, priv->tx_desc_dma,
|
|
||||||
+ ENETDMA_6345_RSTART_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* clear remaining state ram for rx & tx channel */
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_6345_FC_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_6345_FC_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* set max rx/tx length */
|
|
||||||
enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
|
|
||||||
enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
|
|
||||||
|
|
||||||
/* set dma maximum burst len */
|
|
||||||
- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
- ENETDMA_MAXBURST_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
- ENETDMA_MAXBURST_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
+ ENETDMA_MAXBURST_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
+ ENETDMA_MAXBURST_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
+ ENETDMA_6345_MAXBURST_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
|
||||||
+ ENETDMA_6345_MAXBURST_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* set correct transmit fifo watermark */
|
|
||||||
enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG);
|
|
||||||
|
|
||||||
/* set flow control low/high threshold to 1/3 / 2/3 */
|
|
||||||
- val = priv->rx_ring_size / 3;
|
|
||||||
- enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
|
|
||||||
- val = (priv->rx_ring_size * 2) / 3;
|
|
||||||
- enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ val = priv->rx_ring_size / 3;
|
|
||||||
+ enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
|
|
||||||
+ val = (priv->rx_ring_size * 2) / 3;
|
|
||||||
+ enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, 5, ENETDMA_6345_FC_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, priv->rx_ring_size, ENETDMA_6345_LEN_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, priv->tx_ring_size, ENETDMA_6345_LEN_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* all set, enable mac and interrupts, start dma engine and
|
|
||||||
* kick rx dma channel */
|
|
||||||
@@ -961,27 +1045,58 @@ static int bcm_enet_open(struct net_devi
|
|
||||||
val = enet_readl(priv, ENET_CTL_REG);
|
|
||||||
val |= ENET_CTL_ENABLE_MASK;
|
|
||||||
enet_writel(priv, val, ENET_CTL_REG);
|
|
||||||
- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
|
|
||||||
- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
|
|
||||||
- ENETDMA_CHANCFG_REG(priv->rx_chan));
|
|
||||||
+
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
|
|
||||||
+ ENETDMA_CHANCFG_REG(priv->rx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_6345_CHANCFG_EN_MASK |
|
|
||||||
+ ENETDMA_6345_CHAINING_MASK |
|
|
||||||
+ ENETDMA_6345_WRAP_EN_MASK |
|
|
||||||
+ ENETDMA_6345_FLOWC_EN_MASK,
|
|
||||||
+ ENETDMA_6345_CHANCFG_REG(priv->rx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* watch "mib counters about to overflow" interrupt */
|
|
||||||
enet_writel(priv, ENET_IR_MIB, ENET_IR_REG);
|
|
||||||
enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG);
|
|
||||||
|
|
||||||
/* watch "packet transferred" interrupt in rx and tx */
|
|
||||||
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
- ENETDMA_IR_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
- ENETDMA_IR_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
+ ENETDMA_IR_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
+ ENETDMA_IR_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
|
|
||||||
+ ENETDMA_IR_PKTDONE_MASK |
|
|
||||||
+ ENETDMA_IR_NOTOWNER_MASK,
|
|
||||||
+ ENETDMA_6345_IR_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
|
|
||||||
+ ENETDMA_IR_PKTDONE_MASK |
|
|
||||||
+ ENETDMA_IR_NOTOWNER_MASK,
|
|
||||||
+ ENETDMA_6345_IR_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* make sure we enable napi before rx interrupt */
|
|
||||||
napi_enable(&priv->napi);
|
|
||||||
|
|
||||||
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
- ENETDMA_IRMASK_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
- ENETDMA_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
+ ENETDMA_IRMASK_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
|
||||||
+ ENETDMA_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
|
|
||||||
+ ENETDMA_IR_PKTDONE_MASK |
|
|
||||||
+ ENETDMA_IR_NOTOWNER_MASK,
|
|
||||||
+ ENETDMA_6345_IRMASK_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, ENETDMA_IR_BUFDONE_MASK |
|
|
||||||
+ ENETDMA_IR_PKTDONE_MASK |
|
|
||||||
+ ENETDMA_IR_NOTOWNER_MASK,
|
|
||||||
+ ENETDMA_6345_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
if (priv->has_phy)
|
|
||||||
phy_start(priv->phydev);
|
|
||||||
@@ -1061,13 +1176,19 @@ static void bcm_enet_disable_dma(struct
|
|
||||||
{
|
|
||||||
int limit;
|
|
||||||
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
|
|
||||||
+ if (!BCMCPU_IS_6345())
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
|
|
||||||
+ else
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_6345_CHANCFG_REG(chan));
|
|
||||||
|
|
||||||
limit = 1000;
|
|
||||||
do {
|
|
||||||
u32 val;
|
|
||||||
|
|
||||||
- val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
|
|
||||||
+ if (!BCMCPU_IS_6345())
|
|
||||||
+ val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
|
|
||||||
+ else
|
|
||||||
+ val = enet_dma_readl(priv, ENETDMA_6345_CHANCFG_REG(chan));
|
|
||||||
if (!(val & ENETDMA_CHANCFG_EN_MASK))
|
|
||||||
break;
|
|
||||||
udelay(1);
|
|
||||||
@@ -1094,8 +1215,13 @@ static int bcm_enet_stop(struct net_devi
|
|
||||||
|
|
||||||
/* mask all interrupts */
|
|
||||||
enet_writel(priv, 0, ENET_IRMASK_REG);
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
|
|
||||||
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ if (!BCMCPU_IS_6345()) {
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ } else {
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->rx_chan));
|
|
||||||
+ enet_dma_writel(priv, 0, ENETDMA_6345_IRMASK_REG(priv->tx_chan));
|
|
||||||
+ }
|
|
||||||
|
|
||||||
/* make sure no mib update is scheduled */
|
|
||||||
cancel_work_sync(&priv->mib_update_task);
|
|
||||||
@@ -1622,6 +1748,7 @@ static int __devinit bcm_enet_probe(stru
|
|
||||||
const char *clk_name;
|
|
||||||
unsigned int iomem_size;
|
|
||||||
int i, ret;
|
|
||||||
+ unsigned int chan_offset = 0;
|
|
||||||
|
|
||||||
/* stop if shared driver failed, assume driver->probe will be
|
|
||||||
* called in the same order we register devices (correct ?) */
|
|
||||||
@@ -1661,10 +1788,13 @@ static int __devinit bcm_enet_probe(stru
|
|
||||||
priv->irq_tx = res_irq_tx->start;
|
|
||||||
priv->mac_id = pdev->id;
|
|
||||||
|
|
||||||
+ if (BCMCPU_IS_6345())
|
|
||||||
+ chan_offset = 1;
|
|
||||||
+
|
|
||||||
/* get rx & tx dma channel id for this mac */
|
|
||||||
if (priv->mac_id == 0) {
|
|
||||||
- priv->rx_chan = 0;
|
|
||||||
- priv->tx_chan = 1;
|
|
||||||
+ priv->rx_chan = 0 + chan_offset;
|
|
||||||
+ priv->tx_chan = 1 + chan_offset;
|
|
||||||
clk_name = "enet0";
|
|
||||||
} else {
|
|
||||||
priv->rx_chan = 2;
|
|
||||||
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
|
|
||||||
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
|
|
||||||
@@ -46,6 +46,9 @@ struct bcm_enet_desc {
|
|
||||||
#define DMADESC_ESOP_MASK (DMADESC_EOP_MASK | DMADESC_SOP_MASK)
|
|
||||||
#define DMADESC_WRAP_MASK (1 << 12)
|
|
||||||
|
|
||||||
+/* Shift down for EOP, SOP and WRAP bits */
|
|
||||||
+#define DMADESC_6345_SHIFT (3)
|
|
||||||
+
|
|
||||||
#define DMADESC_UNDER_MASK (1 << 9)
|
|
||||||
#define DMADESC_APPEND_CRC (1 << 8)
|
|
||||||
#define DMADESC_OVSIZE_MASK (1 << 4)
|
|
||||||
--- a/arch/mips/bcm63xx/dev-enet.c
|
|
||||||
+++ b/arch/mips/bcm63xx/dev-enet.c
|
|
||||||
@@ -104,7 +104,7 @@ int __init bcm63xx_enet_register(int uni
|
|
||||||
if (unit > 1)
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
- if (unit == 1 && BCMCPU_IS_6338())
|
|
||||||
+ if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
if (!shared_device_registered) {
|
|
|
@ -11,7 +11,7 @@
|
||||||
bcm_gpio_writel(val, GPIO_MODE_REG);
|
bcm_gpio_writel(val, GPIO_MODE_REG);
|
||||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||||
@@ -467,6 +467,8 @@
|
@@ -468,6 +468,8 @@
|
||||||
#define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
|
#define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
|
||||||
#define GPIO_MODE_6358_SERIAL_LED (1 << 10)
|
#define GPIO_MODE_6358_SERIAL_LED (1 << 10)
|
||||||
#define GPIO_MODE_6358_UTOPIA (1 << 12)
|
#define GPIO_MODE_6358_UTOPIA (1 << 12)
|
||||||
|
|
|
@ -145,7 +145,7 @@
|
||||||
#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
|
#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
|
||||||
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||||
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
||||||
@@ -1008,4 +1008,116 @@
|
@@ -976,4 +976,116 @@
|
||||||
#define M2M_SRCID_REG(x) ((x) * 0x40 + 0x14)
|
#define M2M_SRCID_REG(x) ((x) * 0x40 + 0x14)
|
||||||
#define M2M_DSTID_REG(x) ((x) * 0x40 + 0x18)
|
#define M2M_DSTID_REG(x) ((x) * 0x40 + 0x18)
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,169 @@
|
||||||
|
From b11218c750ab92cfab4408a0328f1b36ceec3f33 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Jonas Gorski <jonas.gorski@gmail.com>
|
||||||
|
Date: Fri, 6 Jan 2012 12:24:18 +0100
|
||||||
|
Subject: [PATCH 19/63] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
|
||||||
|
|
||||||
|
Only connect/disconnect the phy during probe and remove, not during any
|
||||||
|
open/close. The phy seldom changes during the runtime, and disconnecting
|
||||||
|
the phy during close will prevent it from keeping any configuration over
|
||||||
|
a down/up cycle.
|
||||||
|
|
||||||
|
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
|
||||||
|
---
|
||||||
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 84 +++++++++++++-------------
|
||||||
|
1 files changed, 41 insertions(+), 43 deletions(-)
|
||||||
|
|
||||||
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
@@ -784,10 +784,8 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
struct bcm_enet_priv *priv;
|
||||||
|
struct sockaddr addr;
|
||||||
|
struct device *kdev;
|
||||||
|
- struct phy_device *phydev;
|
||||||
|
int i, ret;
|
||||||
|
unsigned int size;
|
||||||
|
- char phy_id[MII_BUS_ID_SIZE + 3];
|
||||||
|
void *p;
|
||||||
|
u32 val;
|
||||||
|
|
||||||
|
@@ -795,40 +793,10 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
kdev = &priv->pdev->dev;
|
||||||
|
|
||||||
|
if (priv->has_phy) {
|
||||||
|
- /* connect to PHY */
|
||||||
|
- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
|
||||||
|
- priv->mii_bus->id, priv->phy_id);
|
||||||
|
-
|
||||||
|
- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, 0,
|
||||||
|
- PHY_INTERFACE_MODE_MII);
|
||||||
|
-
|
||||||
|
- if (IS_ERR(phydev)) {
|
||||||
|
- dev_err(kdev, "could not attach to PHY\n");
|
||||||
|
- return PTR_ERR(phydev);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- /* mask with MAC supported features */
|
||||||
|
- phydev->supported &= (SUPPORTED_10baseT_Half |
|
||||||
|
- SUPPORTED_10baseT_Full |
|
||||||
|
- SUPPORTED_100baseT_Half |
|
||||||
|
- SUPPORTED_100baseT_Full |
|
||||||
|
- SUPPORTED_Autoneg |
|
||||||
|
- SUPPORTED_Pause |
|
||||||
|
- SUPPORTED_MII);
|
||||||
|
- phydev->advertising = phydev->supported;
|
||||||
|
-
|
||||||
|
- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
|
||||||
|
- phydev->advertising |= SUPPORTED_Pause;
|
||||||
|
- else
|
||||||
|
- phydev->advertising &= ~SUPPORTED_Pause;
|
||||||
|
-
|
||||||
|
- dev_info(kdev, "attached PHY at address %d [%s]\n",
|
||||||
|
- phydev->addr, phydev->drv->name);
|
||||||
|
-
|
||||||
|
+ /* Reset state */
|
||||||
|
priv->old_link = 0;
|
||||||
|
priv->old_duplex = -1;
|
||||||
|
priv->old_pause = -1;
|
||||||
|
- priv->phydev = phydev;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* mask all interrupts and request them */
|
||||||
|
@@ -838,7 +806,7 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
|
||||||
|
ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
|
||||||
|
if (ret)
|
||||||
|
- goto out_phy_disconnect;
|
||||||
|
+ return ret;
|
||||||
|
|
||||||
|
ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, IRQF_DISABLED,
|
||||||
|
dev->name, dev);
|
||||||
|
@@ -1025,9 +993,6 @@ out_freeirq_rx:
|
||||||
|
out_freeirq:
|
||||||
|
free_irq(dev->irq, dev);
|
||||||
|
|
||||||
|
-out_phy_disconnect:
|
||||||
|
- phy_disconnect(priv->phydev);
|
||||||
|
-
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -1132,12 +1097,6 @@ static int bcm_enet_stop(struct net_devi
|
||||||
|
free_irq(priv->irq_rx, dev);
|
||||||
|
free_irq(dev->irq, dev);
|
||||||
|
|
||||||
|
- /* release phy */
|
||||||
|
- if (priv->has_phy) {
|
||||||
|
- phy_disconnect(priv->phydev);
|
||||||
|
- priv->phydev = NULL;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -1714,6 +1673,8 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
|
||||||
|
/* MII bus registration */
|
||||||
|
if (priv->has_phy) {
|
||||||
|
+ struct phy_device *phydev;
|
||||||
|
+ char phy_id[MII_BUS_ID_SIZE + 3];
|
||||||
|
|
||||||
|
priv->mii_bus = mdiobus_alloc();
|
||||||
|
if (!priv->mii_bus) {
|
||||||
|
@@ -1750,6 +1711,38 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
dev_err(&pdev->dev, "unable to register mdio bus\n");
|
||||||
|
goto out_free_mdio;
|
||||||
|
}
|
||||||
|
+
|
||||||
|
+ /* connect to PHY */
|
||||||
|
+ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
|
||||||
|
+ priv->mii_bus->id, priv->phy_id);
|
||||||
|
+
|
||||||
|
+ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, 0,
|
||||||
|
+ PHY_INTERFACE_MODE_MII);
|
||||||
|
+
|
||||||
|
+ if (IS_ERR(phydev)) {
|
||||||
|
+ dev_err(&pdev->dev, "could not attach to PHY\n");
|
||||||
|
+ goto out_unregister_mdio;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ /* mask with MAC supported features */
|
||||||
|
+ phydev->supported &= (SUPPORTED_10baseT_Half |
|
||||||
|
+ SUPPORTED_10baseT_Full |
|
||||||
|
+ SUPPORTED_100baseT_Half |
|
||||||
|
+ SUPPORTED_100baseT_Full |
|
||||||
|
+ SUPPORTED_Autoneg |
|
||||||
|
+ SUPPORTED_Pause |
|
||||||
|
+ SUPPORTED_MII);
|
||||||
|
+ phydev->advertising = phydev->supported;
|
||||||
|
+
|
||||||
|
+ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
|
||||||
|
+ phydev->advertising |= SUPPORTED_Pause;
|
||||||
|
+ else
|
||||||
|
+ phydev->advertising &= ~SUPPORTED_Pause;
|
||||||
|
+
|
||||||
|
+ dev_info(&pdev->dev, "attached PHY at address %d [%s]\n",
|
||||||
|
+ phydev->addr, phydev->drv->name);
|
||||||
|
+
|
||||||
|
+ priv->phydev = phydev;
|
||||||
|
} else {
|
||||||
|
|
||||||
|
/* run platform code to initialize PHY device */
|
||||||
|
@@ -1795,6 +1788,9 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
out_unregister_mdio:
|
||||||
|
+ if (priv->phydev)
|
||||||
|
+ phy_disconnect(priv->phydev);
|
||||||
|
+
|
||||||
|
if (priv->mii_bus) {
|
||||||
|
mdiobus_unregister(priv->mii_bus);
|
||||||
|
kfree(priv->mii_bus->irq);
|
||||||
|
@@ -1845,6 +1841,8 @@ static int __devexit bcm_enet_remove(str
|
||||||
|
enet_writel(priv, 0, ENET_MIISC_REG);
|
||||||
|
|
||||||
|
if (priv->has_phy) {
|
||||||
|
+ phy_disconnect(priv->phydev);
|
||||||
|
+ priv->phydev = NULL;
|
||||||
|
mdiobus_unregister(priv->mii_bus);
|
||||||
|
kfree(priv->mii_bus->irq);
|
||||||
|
mdiobus_free(priv->mii_bus);
|
|
@ -0,0 +1,40 @@
|
||||||
|
From accc558f334662c8b16c121b4819931c028e8eb0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Maxime Bizon <mbizon@freebox.fr>
|
||||||
|
Date: Mon, 8 Jun 2009 16:12:10 +0200
|
||||||
|
Subject: [PATCH 27/63] bcm63xx_enet: implement reset_autoneg ethtool.
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 15 +++++++++++++++
|
||||||
|
1 files changed, 15 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
@@ -1290,6 +1290,20 @@ static void bcm_enet_get_ethtool_stats(s
|
||||||
|
mutex_unlock(&priv->mib_update_lock);
|
||||||
|
}
|
||||||
|
|
||||||
|
+static int bcm_enet_nway_reset(struct net_device *dev)
|
||||||
|
+{
|
||||||
|
+ struct bcm_enet_priv *priv;
|
||||||
|
+
|
||||||
|
+ priv = netdev_priv(dev);
|
||||||
|
+ if (priv->has_phy) {
|
||||||
|
+ if (!priv->phydev)
|
||||||
|
+ return -ENODEV;
|
||||||
|
+ return genphy_restart_aneg(priv->phydev);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return -EOPNOTSUPP;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
static int bcm_enet_get_settings(struct net_device *dev,
|
||||||
|
struct ethtool_cmd *cmd)
|
||||||
|
{
|
||||||
|
@@ -1432,6 +1446,7 @@ static const struct ethtool_ops bcm_enet
|
||||||
|
.get_strings = bcm_enet_get_strings,
|
||||||
|
.get_sset_count = bcm_enet_get_sset_count,
|
||||||
|
.get_ethtool_stats = bcm_enet_get_ethtool_stats,
|
||||||
|
+ .nway_reset = bcm_enet_nway_reset,
|
||||||
|
.get_settings = bcm_enet_get_settings,
|
||||||
|
.set_settings = bcm_enet_set_settings,
|
||||||
|
.get_drvinfo = bcm_enet_get_drvinfo,
|
|
@ -0,0 +1,69 @@
|
||||||
|
From dbd9b51204aa4114756b8659e180139ef3878032 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Maxime Bizon <mbizon@freebox.fr>
|
||||||
|
Date: Thu, 21 Jan 2010 17:28:36 +0100
|
||||||
|
Subject: [PATCH 28/63] bcm63xx_enet: use resource_size().
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 18 ++++++++----------
|
||||||
|
1 files changed, 8 insertions(+), 10 deletions(-)
|
||||||
|
|
||||||
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
@@ -1594,7 +1594,6 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx;
|
||||||
|
struct mii_bus *bus;
|
||||||
|
const char *clk_name;
|
||||||
|
- unsigned int iomem_size;
|
||||||
|
int i, ret;
|
||||||
|
|
||||||
|
/* stop if shared driver failed, assume driver->probe will be
|
||||||
|
@@ -1619,13 +1618,13 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
if (ret)
|
||||||
|
goto out;
|
||||||
|
|
||||||
|
- iomem_size = resource_size(res_mem);
|
||||||
|
- if (!request_mem_region(res_mem->start, iomem_size, "bcm63xx_enet")) {
|
||||||
|
+ if (!request_mem_region(res_mem->start, resource_size(res_mem),
|
||||||
|
+ "bcm63xx_enet")) {
|
||||||
|
ret = -EBUSY;
|
||||||
|
goto out;
|
||||||
|
}
|
||||||
|
|
||||||
|
- priv->base = ioremap(res_mem->start, iomem_size);
|
||||||
|
+ priv->base = ioremap(res_mem->start, resource_size(res_mem));
|
||||||
|
if (priv->base == NULL) {
|
||||||
|
ret = -ENOMEM;
|
||||||
|
goto out_release_mem;
|
||||||
|
@@ -1831,7 +1830,7 @@ out_unmap:
|
||||||
|
iounmap(priv->base);
|
||||||
|
|
||||||
|
out_release_mem:
|
||||||
|
- release_mem_region(res_mem->start, iomem_size);
|
||||||
|
+ release_mem_region(res_mem->start, resource_size(res_mem));
|
||||||
|
out:
|
||||||
|
free_netdev(dev);
|
||||||
|
return ret;
|
||||||
|
@@ -1903,19 +1902,18 @@ struct platform_driver bcm63xx_enet_driv
|
||||||
|
static int __devinit bcm_enet_shared_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
- unsigned int iomem_size;
|
||||||
|
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
if (!res)
|
||||||
|
return -ENODEV;
|
||||||
|
|
||||||
|
- iomem_size = resource_size(res);
|
||||||
|
- if (!request_mem_region(res->start, iomem_size, "bcm63xx_enet_dma"))
|
||||||
|
+ if (!request_mem_region(res->start, resource_size(res),
|
||||||
|
+ "bcm63xx_enet_dma"))
|
||||||
|
return -EBUSY;
|
||||||
|
|
||||||
|
- bcm_enet_shared_base = ioremap(res->start, iomem_size);
|
||||||
|
+ bcm_enet_shared_base = ioremap(res->start, resource_size(res));
|
||||||
|
if (!bcm_enet_shared_base) {
|
||||||
|
- release_mem_region(res->start, iomem_size);
|
||||||
|
+ release_mem_region(res->start, resource_size(res));
|
||||||
|
return -ENOMEM;
|
||||||
|
}
|
||||||
|
return 0;
|
|
@ -0,0 +1,20 @@
|
||||||
|
From fd15ecd10c95480be5635f8993b781fe3a1527c2 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Maxime Bizon <mbizon@freebox.fr>
|
||||||
|
Date: Fri, 29 Apr 2011 16:54:50 +0200
|
||||||
|
Subject: [PATCH 29/63] bcm63xx_enet: disable clock when uninitializing device.
|
||||||
|
|
||||||
|
---
|
||||||
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 ++
|
||||||
|
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
@@ -1870,6 +1870,8 @@ static int __devexit bcm_enet_remove(str
|
||||||
|
}
|
||||||
|
|
||||||
|
/* release device resources */
|
||||||
|
+ clk_disable(priv->mac_clk);
|
||||||
|
+ clk_put(priv->mac_clk);
|
||||||
|
iounmap(priv->base);
|
||||||
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
release_mem_region(res->start, resource_size(res));
|
|
@ -0,0 +1,381 @@
|
||||||
|
From 305579c1f946ed1aa6c125252ace21c53d47c11d Mon Sep 17 00:00:00 2001
|
||||||
|
From: Maxime Bizon <mbizon@freebox.fr>
|
||||||
|
Date: Thu, 21 Jan 2010 17:50:54 +0100
|
||||||
|
Subject: [PATCH 30/63] bcm63xx_enet: split dma registers access.
|
||||||
|
|
||||||
|
---
|
||||||
|
arch/mips/bcm63xx/dev-enet.c | 23 +++-
|
||||||
|
arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 4 +-
|
||||||
|
drivers/net/ethernet/broadcom/bcm63xx_enet.c | 179 ++++++++++++++--------
|
||||||
|
3 files changed, 138 insertions(+), 68 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/bcm63xx/dev-enet.c
|
||||||
|
+++ b/arch/mips/bcm63xx/dev-enet.c
|
||||||
|
@@ -19,6 +19,16 @@ static struct resource shared_res[] = {
|
||||||
|
.end = -1, /* filled at runtime */
|
||||||
|
.flags = IORESOURCE_MEM,
|
||||||
|
},
|
||||||
|
+ {
|
||||||
|
+ .start = -1, /* filled at runtime */
|
||||||
|
+ .end = -1, /* filled at runtime */
|
||||||
|
+ .flags = IORESOURCE_MEM,
|
||||||
|
+ },
|
||||||
|
+ {
|
||||||
|
+ .start = -1, /* filled at runtime */
|
||||||
|
+ .end = -1, /* filled at runtime */
|
||||||
|
+ .flags = IORESOURCE_MEM,
|
||||||
|
+ },
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device bcm63xx_enet_shared_device = {
|
||||||
|
@@ -110,10 +120,15 @@ int __init bcm63xx_enet_register(int uni
|
||||||
|
if (!shared_device_registered) {
|
||||||
|
shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
|
||||||
|
shared_res[0].end = shared_res[0].start;
|
||||||
|
- if (BCMCPU_IS_6338())
|
||||||
|
- shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1;
|
||||||
|
- else
|
||||||
|
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
|
||||||
|
+ shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
|
||||||
|
+
|
||||||
|
+ shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
|
||||||
|
+ shared_res[1].end = shared_res[1].start;
|
||||||
|
+ shared_res[1].end += RSET_ENETDMAC_SIZE(16) - 1;
|
||||||
|
+
|
||||||
|
+ shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
|
||||||
|
+ shared_res[2].end = shared_res[2].start;
|
||||||
|
+ shared_res[2].end += RSET_ENETDMAS_SIZE(16) - 1;
|
||||||
|
|
||||||
|
ret = platform_device_register(&bcm63xx_enet_shared_device);
|
||||||
|
if (ret)
|
||||||
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||||
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
|
||||||
|
@@ -136,7 +136,9 @@ enum bcm63xx_regs_set {
|
||||||
|
#define RSET_DSL_SIZE 4096
|
||||||
|
#define RSET_WDT_SIZE 12
|
||||||
|
#define RSET_ENET_SIZE 2048
|
||||||
|
-#define RSET_ENETDMA_SIZE 2048
|
||||||
|
+#define RSET_ENETDMA_SIZE 256
|
||||||
|
+#define RSET_ENETDMAC_SIZE(chans) (16 * (chans))
|
||||||
|
+#define RSET_ENETDMAS_SIZE(chans) (16 * (chans))
|
||||||
|
#define RSET_ENETSW_SIZE 65536
|
||||||
|
#define RSET_SPI_SIZE 256
|
||||||
|
#define RSET_UART_SIZE 24
|
||||||
|
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
|
||||||
|
@@ -41,8 +41,8 @@ static int copybreak __read_mostly = 128
|
||||||
|
module_param(copybreak, int, 0);
|
||||||
|
MODULE_PARM_DESC(copybreak, "Receive copy threshold");
|
||||||
|
|
||||||
|
-/* io memory shared between all devices */
|
||||||
|
-static void __iomem *bcm_enet_shared_base;
|
||||||
|
+/* io registers memory shared between all devices */
|
||||||
|
+static void __iomem *bcm_enet_shared_base[3];
|
||||||
|
|
||||||
|
/*
|
||||||
|
* io helpers to access mac registers
|
||||||
|
@@ -63,13 +63,35 @@ static inline void enet_writel(struct bc
|
||||||
|
*/
|
||||||
|
static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off)
|
||||||
|
{
|
||||||
|
- return bcm_readl(bcm_enet_shared_base + off);
|
||||||
|
+ return bcm_readl(bcm_enet_shared_base[0] + off);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void enet_dma_writel(struct bcm_enet_priv *priv,
|
||||||
|
u32 val, u32 off)
|
||||||
|
{
|
||||||
|
- bcm_writel(val, bcm_enet_shared_base + off);
|
||||||
|
+ bcm_writel(val, bcm_enet_shared_base[0] + off);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static inline u32 enet_dmac_readl(struct bcm_enet_priv *priv, u32 off)
|
||||||
|
+{
|
||||||
|
+ return bcm_readl(bcm_enet_shared_base[1] + off);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static inline void enet_dmac_writel(struct bcm_enet_priv *priv,
|
||||||
|
+ u32 val, u32 off)
|
||||||
|
+{
|
||||||
|
+ bcm_writel(val, bcm_enet_shared_base[1] + off);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static inline u32 enet_dmas_readl(struct bcm_enet_priv *priv, u32 off)
|
||||||
|
+{
|
||||||
|
+ return bcm_readl(bcm_enet_shared_base[2] + off);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static inline void enet_dmas_writel(struct bcm_enet_priv *priv,
|
||||||
|
+ u32 val, u32 off)
|
||||||
|
+{
|
||||||
|
+ bcm_writel(val, bcm_enet_shared_base[2] + off);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -353,8 +375,8 @@ static int bcm_enet_receive_queue(struct
|
||||||
|
bcm_enet_refill_rx(dev);
|
||||||
|
|
||||||
|
/* kick rx dma */
|
||||||
|
- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
|
||||||
|
- ENETDMA_CHANCFG_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
|
||||||
|
+ ENETDMAC_CHANCFG_REG(priv->rx_chan));
|
||||||
|
}
|
||||||
|
|
||||||
|
return processed;
|
||||||
|
@@ -429,10 +451,10 @@ static int bcm_enet_poll(struct napi_str
|
||||||
|
dev = priv->net_dev;
|
||||||
|
|
||||||
|
/* ack interrupts */
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IR_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IR_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IR_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IR_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* reclaim sent skb */
|
||||||
|
tx_work_done = bcm_enet_tx_reclaim(dev, 0);
|
||||||
|
@@ -451,10 +473,10 @@ static int bcm_enet_poll(struct napi_str
|
||||||
|
napi_complete(napi);
|
||||||
|
|
||||||
|
/* restore rx/tx interrupt */
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IRMASK_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IRMASK_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IRMASK_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IRMASK_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
return rx_work_done;
|
||||||
|
}
|
||||||
|
@@ -497,8 +519,8 @@ static irqreturn_t bcm_enet_isr_dma(int
|
||||||
|
priv = netdev_priv(dev);
|
||||||
|
|
||||||
|
/* mask rx/tx interrupts */
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
napi_schedule(&priv->napi);
|
||||||
|
|
||||||
|
@@ -557,8 +579,8 @@ static int bcm_enet_start_xmit(struct sk
|
||||||
|
wmb();
|
||||||
|
|
||||||
|
/* kick tx dma */
|
||||||
|
- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
|
||||||
|
- ENETDMA_CHANCFG_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
|
||||||
|
+ ENETDMAC_CHANCFG_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* stop queue if no more desc available */
|
||||||
|
if (!priv->tx_desc_count)
|
||||||
|
@@ -801,8 +823,8 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
|
||||||
|
/* mask all interrupts and request them */
|
||||||
|
enet_writel(priv, 0, ENET_IRMASK_REG);
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
|
||||||
|
if (ret)
|
||||||
|
@@ -891,28 +913,28 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
}
|
||||||
|
|
||||||
|
/* write rx & tx ring addresses */
|
||||||
|
- enet_dma_writel(priv, priv->rx_desc_dma,
|
||||||
|
- ENETDMA_RSTART_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, priv->tx_desc_dma,
|
||||||
|
- ENETDMA_RSTART_REG(priv->tx_chan));
|
||||||
|
+ enet_dmas_writel(priv, priv->rx_desc_dma,
|
||||||
|
+ ENETDMAS_RSTART_REG(priv->rx_chan));
|
||||||
|
+ enet_dmas_writel(priv, priv->tx_desc_dma,
|
||||||
|
+ ENETDMAS_RSTART_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* clear remaining state ram for rx & tx channel */
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
|
||||||
|
+ enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* set max rx/tx length */
|
||||||
|
enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG);
|
||||||
|
enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
|
||||||
|
|
||||||
|
/* set dma maximum burst len */
|
||||||
|
- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
||||||
|
- ENETDMA_MAXBURST_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, BCMENET_DMA_MAXBURST,
|
||||||
|
- ENETDMA_MAXBURST_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
|
||||||
|
+ ENETDMAC_MAXBURST_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
|
||||||
|
+ ENETDMAC_MAXBURST_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* set correct transmit fifo watermark */
|
||||||
|
enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG);
|
||||||
|
@@ -930,26 +952,26 @@ static int bcm_enet_open(struct net_devi
|
||||||
|
val |= ENET_CTL_ENABLE_MASK;
|
||||||
|
enet_writel(priv, val, ENET_CTL_REG);
|
||||||
|
enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
|
||||||
|
- enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK,
|
||||||
|
- ENETDMA_CHANCFG_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
|
||||||
|
+ ENETDMAC_CHANCFG_REG(priv->rx_chan));
|
||||||
|
|
||||||
|
/* watch "mib counters about to overflow" interrupt */
|
||||||
|
enet_writel(priv, ENET_IR_MIB, ENET_IR_REG);
|
||||||
|
enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG);
|
||||||
|
|
||||||
|
/* watch "packet transferred" interrupt in rx and tx */
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IR_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IR_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IR_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IR_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* make sure we enable napi before rx interrupt */
|
||||||
|
napi_enable(&priv->napi);
|
||||||
|
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IRMASK_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK,
|
||||||
|
- ENETDMA_IRMASK_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IRMASK_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
|
||||||
|
+ ENETDMAC_IRMASK_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
if (priv->has_phy)
|
||||||
|
phy_start(priv->phydev);
|
||||||
|
@@ -1026,14 +1048,14 @@ static void bcm_enet_disable_dma(struct
|
||||||
|
{
|
||||||
|
int limit;
|
||||||
|
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_CHANCFG_REG(chan));
|
||||||
|
|
||||||
|
limit = 1000;
|
||||||
|
do {
|
||||||
|
u32 val;
|
||||||
|
|
||||||
|
- val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan));
|
||||||
|
- if (!(val & ENETDMA_CHANCFG_EN_MASK))
|
||||||
|
+ val = enet_dmac_readl(priv, ENETDMAC_CHANCFG_REG(chan));
|
||||||
|
+ if (!(val & ENETDMAC_CHANCFG_EN_MASK))
|
||||||
|
break;
|
||||||
|
udelay(1);
|
||||||
|
} while (limit--);
|
||||||
|
@@ -1059,8 +1081,8 @@ static int bcm_enet_stop(struct net_devi
|
||||||
|
|
||||||
|
/* mask all interrupts */
|
||||||
|
enet_writel(priv, 0, ENET_IRMASK_REG);
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan));
|
||||||
|
- enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
|
||||||
|
+ enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
|
||||||
|
|
||||||
|
/* make sure no mib update is scheduled */
|
||||||
|
cancel_work_sync(&priv->mib_update_task);
|
||||||
|
@@ -1598,7 +1620,7 @@ static int __devinit bcm_enet_probe(stru
|
||||||
|
|
||||||
|
/* stop if shared driver failed, assume driver->probe will be
|
||||||
|
* called in the same order we register devices (correct ?) */
|
||||||
|
- if (!bcm_enet_shared_base)
|
||||||
|
+ if (!bcm_enet_shared_base[0])
|
||||||
|
return -ENODEV;
|
||||||
|
|
||||||
|
res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
@@ -1904,30 +1926,61 @@ struct platform_driver bcm63xx_enet_driv
|
||||||
|
static int __devinit bcm_enet_shared_probe(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
+ int ret, i, requested[3];
|
||||||
|
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
- if (!res)
|
||||||
|
- return -ENODEV;
|
||||||
|
+ memset(bcm_enet_shared_base, 0, sizeof (bcm_enet_shared_base));
|
||||||
|
+ memset(requested, 0, sizeof (requested));
|
||||||
|
|
||||||
|
- if (!request_mem_region(res->start, resource_size(res),
|
||||||
|
- "bcm63xx_enet_dma"))
|
||||||
|
- return -EBUSY;
|
||||||
|
+ for (i = 0; i < 3; i++) {
|
||||||
|
+ void __iomem *p;
|
||||||
|
|
||||||
|
- bcm_enet_shared_base = ioremap(res->start, resource_size(res));
|
||||||
|
- if (!bcm_enet_shared_base) {
|
||||||
|
- release_mem_region(res->start, resource_size(res));
|
||||||
|
- return -ENOMEM;
|
||||||
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
||||||
|
+ if (!res) {
|
||||||
|
+ ret = -EINVAL;
|
||||||
|
+ goto fail;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ if (!request_mem_region(res->start, resource_size(res),
|
||||||
|
+ "bcm63xx_enet_dma")) {
|
||||||
|
+ ret = -EBUSY;
|
||||||
|
+ goto fail;
|
||||||
|
+ }
|
||||||
|
+ requested[i] = 0;
|
||||||
|
+
|
||||||
|
+ p = ioremap(res->start, resource_size(res));
|
||||||
|
+ if (!p) {
|
||||||
|
+ ret = -ENOMEM;
|
||||||
|
+ goto fail;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ bcm_enet_shared_base[i] = p;
|
||||||
|
}
|
||||||
|
+
|
||||||
|
return 0;
|
||||||
|
+
|
||||||
|
+fail:
|
||||||
|
+ for (i = 0; i < 3; i++) {
|
||||||
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
||||||
|
+ if (!res)
|
||||||
|
+ continue;
|
||||||
|
+ if (bcm_enet_shared_base[i])
|
||||||
|
+ iounmap(bcm_enet_shared_base[i]);
|
||||||
|
+ if (requested[i])
|
||||||
|
+ release_mem_region(res->start, resource_size(res));
|
||||||
|
+ }
|
||||||
|
+ return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __devexit bcm_enet_shared_remove(struct platform_device *pdev)
|
||||||
|
{
|
||||||
|
struct resource *res;
|
||||||
|
+ int i;
|
||||||
|
|
||||||
|
- iounmap(bcm_enet_shared_base);
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
- release_mem_region(res->start, resource_size(res));
|
||||||
|
+ for (i = 0; i < 3; i++) {
|
||||||
|
+ iounmap(bcm_enet_shared_base[i]);
|
||||||
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
||||||
|
+ release_mem_region(res->start, resource_size(res));
|
||||||
|
+ }
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -95,7 +95,7 @@
|
||||||
|
|
||||||
/* dump cfe version */
|
/* dump cfe version */
|
||||||
cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
|
cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
|
||||||
@@ -2154,6 +2228,13 @@ int __init board_register_devices(void)
|
@@ -2158,6 +2232,13 @@ int __init board_register_devices(void)
|
||||||
val = bcm_mpi_readl(MPI_CSBASE_REG(0));
|
val = bcm_mpi_readl(MPI_CSBASE_REG(0));
|
||||||
val &= MPI_CSBASE_BASE_MASK;
|
val &= MPI_CSBASE_BASE_MASK;
|
||||||
|
|
||||||
|
|
|
@ -102,7 +102,7 @@
|
||||||
static struct board_info __initdata board_DWVS0 = {
|
static struct board_info __initdata board_DWVS0 = {
|
||||||
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||||
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
|
||||||
@@ -57,7 +57,7 @@ struct board_info {
|
@@ -59,7 +59,7 @@ struct board_info {
|
||||||
struct bcm63xx_dsp_platform_data dsp;
|
struct bcm63xx_dsp_platform_data dsp;
|
||||||
|
|
||||||
/* GPIO LEDs */
|
/* GPIO LEDs */
|
||||||
|
|
Loading…
Reference in a new issue