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ar71xx: remove useless irq_desc.status initializations

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SVN-Revision: 27306
This commit is contained in:
Gabor Juhos 2011-06-29 08:57:27 +00:00
parent 01ac07c9b3
commit 9d6af600e1
3 changed files with 4 additions and 13 deletions
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9
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
View file

@ -90,7 +90,6 @@ static struct irqaction ar71xx_gpio_irqaction = {
.name = "cascade [AR71XX GPIO]",
};
#define GPIO_IRQ_INIT_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
#define GPIO_INT_ALL 0xffff
static void __init ar71xx_gpio_irq_init(void)
@ -108,11 +107,9 @@ static void __init ar71xx_gpio_irq_init(void)
__raw_writel(GPIO_INT_ALL, base + GPIO_REG_INT_POLARITY);
for (i = AR71XX_GPIO_IRQ_BASE;
i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++) {
irq_desc[i].status = GPIO_IRQ_INIT_STATUS;
i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
set_irq_chip_and_handler(i, &ar71xx_gpio_irq_chip,
handle_level_irq);
}
setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
}
@ -245,11 +242,9 @@ static void __init ar71xx_misc_irq_init(void)
}
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
irq_desc[i].status = IRQ_DISABLED;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
set_irq_chip_and_handler(i, &ar71xx_misc_irq_chip,
handle_level_irq);
}
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
}

4
target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
View file

@ -373,11 +373,9 @@ static void __init ar71xx_pci_irq_init(void)
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
for (i = AR71XX_PCI_IRQ_BASE;
i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
irq_desc[i].status = IRQ_DISABLED;
i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip,
handle_level_irq);
}
set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
}

4
target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c
View file

@ -345,11 +345,9 @@ static void __init ar724x_pci_irq_init(void)
__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
for (i = AR71XX_PCI_IRQ_BASE;
i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) {
irq_desc[i].status = IRQ_DISABLED;
i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
set_irq_chip_and_handler(i, &ar724x_pci_irq_chip,
handle_level_irq);
}
set_irq_chained_handler(AR71XX_CPU_IRQ_IP2, ar724x_pci_irq_handler);
}