KumiSystems/openwrtv3
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

generic: ar8216: rename AR8216_*_STATS_* defines

Browse source 
The names are misleading, those are only valid from
AR8236. The AR8216 chip uses different offsets.

Thanks to Jonas Gorski for the report.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 34244
This commit is contained in:
Gabor Juhos 2012-11-18 16:20:56 +00:00
parent 9abd8cd004
commit 98f30aac8e
2 changed files with 82 additions and 82 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

80
target/linux/generic/files/drivers/net/phy/ar8216.c
View file

@ -116,45 +116,45 @@ struct ar8216_priv {
} }
static const struct ar8xxx_mib_desc ar8236_mibs[] = { static const struct ar8xxx_mib_desc ar8236_mibs[] = {
MIB_DESC(1, AR8216_STATS_RXBROAD, "RxBroad"), MIB_DESC(1, AR8236_STATS_RXBROAD, "RxBroad"),
MIB_DESC(1, AR8216_STATS_RXPAUSE, "RxPause"), MIB_DESC(1, AR8236_STATS_RXPAUSE, "RxPause"),
MIB_DESC(1, AR8216_STATS_RXMULTI, "RxMulti"), MIB_DESC(1, AR8236_STATS_RXMULTI, "RxMulti"),
MIB_DESC(1, AR8216_STATS_RXFCSERR, "RxFcsErr"), MIB_DESC(1, AR8236_STATS_RXFCSERR, "RxFcsErr"),
MIB_DESC(1, AR8216_STATS_RXALIGNERR, "RxAlignErr"), MIB_DESC(1, AR8236_STATS_RXALIGNERR, "RxAlignErr"),
MIB_DESC(1, AR8216_STATS_RXRUNT, "RxRunt"), MIB_DESC(1, AR8236_STATS_RXRUNT, "RxRunt"),
MIB_DESC(1, AR8216_STATS_RXFRAGMENT, "RxFragment"), MIB_DESC(1, AR8236_STATS_RXFRAGMENT, "RxFragment"),
MIB_DESC(1, AR8216_STATS_RX64BYTE, "Rx64Byte"), MIB_DESC(1, AR8236_STATS_RX64BYTE, "Rx64Byte"),
MIB_DESC(1, AR8216_STATS_RX128BYTE, "Rx128Byte"), MIB_DESC(1, AR8236_STATS_RX128BYTE, "Rx128Byte"),
MIB_DESC(1, AR8216_STATS_RX256BYTE, "Rx256Byte"), MIB_DESC(1, AR8236_STATS_RX256BYTE, "Rx256Byte"),
MIB_DESC(1, AR8216_STATS_RX512BYTE, "Rx512Byte"), MIB_DESC(1, AR8236_STATS_RX512BYTE, "Rx512Byte"),
MIB_DESC(1, AR8216_STATS_RX1024BYTE, "Rx1024Byte"), MIB_DESC(1, AR8236_STATS_RX1024BYTE, "Rx1024Byte"),
MIB_DESC(1, AR8216_STATS_RX1518BYTE, "Rx1518Byte"), MIB_DESC(1, AR8236_STATS_RX1518BYTE, "Rx1518Byte"),
MIB_DESC(1, AR8216_STATS_RXMAXBYTE, "RxMaxByte"), MIB_DESC(1, AR8236_STATS_RXMAXBYTE, "RxMaxByte"),
MIB_DESC(1, AR8216_STATS_RXTOOLONG, "RxTooLong"), MIB_DESC(1, AR8236_STATS_RXTOOLONG, "RxTooLong"),
MIB_DESC(2, AR8216_STATS_RXGOODBYTE, "RxGoodByte"), MIB_DESC(2, AR8236_STATS_RXGOODBYTE, "RxGoodByte"),
MIB_DESC(2, AR8216_STATS_RXBADBYTE, "RxBadByte"), MIB_DESC(2, AR8236_STATS_RXBADBYTE, "RxBadByte"),
MIB_DESC(1, AR8216_STATS_RXOVERFLOW, "RxOverFlow"), MIB_DESC(1, AR8236_STATS_RXOVERFLOW, "RxOverFlow"),
MIB_DESC(1, AR8216_STATS_FILTERED, "Filtered"), MIB_DESC(1, AR8236_STATS_FILTERED, "Filtered"),
MIB_DESC(1, AR8216_STATS_TXBROAD, "TxBroad"), MIB_DESC(1, AR8236_STATS_TXBROAD, "TxBroad"),
MIB_DESC(1, AR8216_STATS_TXPAUSE, "TxPause"), MIB_DESC(1, AR8236_STATS_TXPAUSE, "TxPause"),
MIB_DESC(1, AR8216_STATS_TXMULTI, "TxMulti"), MIB_DESC(1, AR8236_STATS_TXMULTI, "TxMulti"),
MIB_DESC(1, AR8216_STATS_TXUNDERRUN, "TxUnderRun"), MIB_DESC(1, AR8236_STATS_TXUNDERRUN, "TxUnderRun"),
MIB_DESC(1, AR8216_STATS_TX64BYTE, "Tx64Byte"), MIB_DESC(1, AR8236_STATS_TX64BYTE, "Tx64Byte"),
MIB_DESC(1, AR8216_STATS_TX128BYTE, "Tx128Byte"), MIB_DESC(1, AR8236_STATS_TX128BYTE, "Tx128Byte"),
MIB_DESC(1, AR8216_STATS_TX256BYTE, "Tx256Byte"), MIB_DESC(1, AR8236_STATS_TX256BYTE, "Tx256Byte"),
MIB_DESC(1, AR8216_STATS_TX512BYTE, "Tx512Byte"), MIB_DESC(1, AR8236_STATS_TX512BYTE, "Tx512Byte"),
MIB_DESC(1, AR8216_STATS_TX1024BYTE, "Tx1024Byte"), MIB_DESC(1, AR8236_STATS_TX1024BYTE, "Tx1024Byte"),
MIB_DESC(1, AR8216_STATS_TX1518BYTE, "Tx1518Byte"), MIB_DESC(1, AR8236_STATS_TX1518BYTE, "Tx1518Byte"),
MIB_DESC(1, AR8216_STATS_TXMAXBYTE, "TxMaxByte"), MIB_DESC(1, AR8236_STATS_TXMAXBYTE, "TxMaxByte"),
MIB_DESC(1, AR8216_STATS_TXOVERSIZE, "TxOverSize"), MIB_DESC(1, AR8236_STATS_TXOVERSIZE, "TxOverSize"),
MIB_DESC(2, AR8216_STATS_TXBYTE, "TxByte"), MIB_DESC(2, AR8236_STATS_TXBYTE, "TxByte"),
MIB_DESC(1, AR8216_STATS_TXCOLLISION, "TxCollision"), MIB_DESC(1, AR8236_STATS_TXCOLLISION, "TxCollision"),
MIB_DESC(1, AR8216_STATS_TXABORTCOL, "TxAbortCol"), MIB_DESC(1, AR8236_STATS_TXABORTCOL, "TxAbortCol"),
MIB_DESC(1, AR8216_STATS_TXMULTICOL, "TxMultiCol"), MIB_DESC(1, AR8236_STATS_TXMULTICOL, "TxMultiCol"),
MIB_DESC(1, AR8216_STATS_TXSINGLECOL, "TxSingleCol"), MIB_DESC(1, AR8236_STATS_TXSINGLECOL, "TxSingleCol"),
MIB_DESC(1, AR8216_STATS_TXEXCDEFER, "TxExcDefer"), MIB_DESC(1, AR8236_STATS_TXEXCDEFER, "TxExcDefer"),
MIB_DESC(1, AR8216_STATS_TXDEFER, "TxDefer"), MIB_DESC(1, AR8236_STATS_TXDEFER, "TxDefer"),
MIB_DESC(1, AR8216_STATS_TXLATECOL, "TxLateCol"), MIB_DESC(1, AR8236_STATS_TXLATECOL, "TxLateCol"),
}; };
#define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev) #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
@ -388,7 +388,7 @@ ar8216_mib_fetch_port_stat(struct ar8216_priv *priv, int port, bool flush)
if (chip_is_ar8327(priv)) if (chip_is_ar8327(priv))
base = AR8327_REG_PORT_STATS_BASE(port); base = AR8327_REG_PORT_STATS_BASE(port);
else else
base = AR8216_REG_PORT_STATS_BASE(port); base = AR8236_REG_PORT_STATS_BASE(port);
mib_stats = &priv->mib_stats[port * priv->chip->num_mibs]; mib_stats = &priv->mib_stats[port * priv->chip->num_mibs];
for (i = 0; i < priv->chip->num_mibs; i++) { for (i = 0; i < priv->chip->num_mibs; i++) {

84
target/linux/generic/files/drivers/net/phy/ar8216.h
View file

@ -160,48 +160,6 @@
#define AR8216_REG_PORT_RATE(_i) (AR8216_PORT_OFFSET(_i) + 0x000c) #define AR8216_REG_PORT_RATE(_i) (AR8216_PORT_OFFSET(_i) + 0x000c)
#define AR8216_REG_PORT_PRIO(_i) (AR8216_PORT_OFFSET(_i) + 0x0010) #define AR8216_REG_PORT_PRIO(_i) (AR8216_PORT_OFFSET(_i) + 0x0010)
#define AR8216_REG_PORT_STATS_BASE(_i) (0x20000 + (_i) * 0x100)
#define AR8216_STATS_RXBROAD 0x00
#define AR8216_STATS_RXPAUSE 0x04
#define AR8216_STATS_RXMULTI 0x08
#define AR8216_STATS_RXFCSERR 0x0c
#define AR8216_STATS_RXALIGNERR 0x10
#define AR8216_STATS_RXRUNT 0x14
#define AR8216_STATS_RXFRAGMENT 0x18
#define AR8216_STATS_RX64BYTE 0x1c
#define AR8216_STATS_RX128BYTE 0x20
#define AR8216_STATS_RX256BYTE 0x24
#define AR8216_STATS_RX512BYTE 0x28
#define AR8216_STATS_RX1024BYTE 0x2c
#define AR8216_STATS_RX1518BYTE 0x30
#define AR8216_STATS_RXMAXBYTE 0x34
#define AR8216_STATS_RXTOOLONG 0x38
#define AR8216_STATS_RXGOODBYTE 0x3c
#define AR8216_STATS_RXBADBYTE 0x44
#define AR8216_STATS_RXOVERFLOW 0x4c
#define AR8216_STATS_FILTERED 0x50
#define AR8216_STATS_TXBROAD 0x54
#define AR8216_STATS_TXPAUSE 0x58
#define AR8216_STATS_TXMULTI 0x5c
#define AR8216_STATS_TXUNDERRUN 0x60
#define AR8216_STATS_TX64BYTE 0x64
#define AR8216_STATS_TX128BYTE 0x68
#define AR8216_STATS_TX256BYTE 0x6c
#define AR8216_STATS_TX512BYTE 0x70
#define AR8216_STATS_TX1024BYTE 0x74
#define AR8216_STATS_TX1518BYTE 0x78
#define AR8216_STATS_TXMAXBYTE 0x7c
#define AR8216_STATS_TXOVERSIZE 0x80
#define AR8216_STATS_TXBYTE 0x84
#define AR8216_STATS_TXCOLLISION 0x8c
#define AR8216_STATS_TXABORTCOL 0x90
#define AR8216_STATS_TXMULTICOL 0x94
#define AR8216_STATS_TXSINGLECOL 0x98
#define AR8216_STATS_TXEXCDEFER 0x9c
#define AR8216_STATS_TXDEFER 0xa0
#define AR8216_STATS_TXLATECOL 0xa4
#define AR8236_REG_PORT_VLAN(_i) (AR8216_PORT_OFFSET((_i)) + 0x0008) #define AR8236_REG_PORT_VLAN(_i) (AR8216_PORT_OFFSET((_i)) + 0x0008)
#define AR8236_PORT_VLAN_DEFAULT_ID BITS(16, 12) #define AR8236_PORT_VLAN_DEFAULT_ID BITS(16, 12)
#define AR8236_PORT_VLAN_DEFAULT_ID_S 16 #define AR8236_PORT_VLAN_DEFAULT_ID_S 16
@ -215,6 +173,48 @@
#define AR8236_PORT_VLAN2_VLAN_MODE BITS(30, 2) #define AR8236_PORT_VLAN2_VLAN_MODE BITS(30, 2)
#define AR8236_PORT_VLAN2_VLAN_MODE_S 30 #define AR8236_PORT_VLAN2_VLAN_MODE_S 30
#define AR8236_REG_PORT_STATS_BASE(_i) (0x20000 + (_i) * 0x100)
#define AR8236_STATS_RXBROAD 0x00
#define AR8236_STATS_RXPAUSE 0x04
#define AR8236_STATS_RXMULTI 0x08
#define AR8236_STATS_RXFCSERR 0x0c
#define AR8236_STATS_RXALIGNERR 0x10
#define AR8236_STATS_RXRUNT 0x14
#define AR8236_STATS_RXFRAGMENT 0x18
#define AR8236_STATS_RX64BYTE 0x1c
#define AR8236_STATS_RX128BYTE 0x20
#define AR8236_STATS_RX256BYTE 0x24
#define AR8236_STATS_RX512BYTE 0x28
#define AR8236_STATS_RX1024BYTE 0x2c
#define AR8236_STATS_RX1518BYTE 0x30
#define AR8236_STATS_RXMAXBYTE 0x34
#define AR8236_STATS_RXTOOLONG 0x38
#define AR8236_STATS_RXGOODBYTE 0x3c
#define AR8236_STATS_RXBADBYTE 0x44
#define AR8236_STATS_RXOVERFLOW 0x4c
#define AR8236_STATS_FILTERED 0x50
#define AR8236_STATS_TXBROAD 0x54
#define AR8236_STATS_TXPAUSE 0x58
#define AR8236_STATS_TXMULTI 0x5c
#define AR8236_STATS_TXUNDERRUN 0x60
#define AR8236_STATS_TX64BYTE 0x64
#define AR8236_STATS_TX128BYTE 0x68
#define AR8236_STATS_TX256BYTE 0x6c
#define AR8236_STATS_TX512BYTE 0x70
#define AR8236_STATS_TX1024BYTE 0x74
#define AR8236_STATS_TX1518BYTE 0x78
#define AR8236_STATS_TXMAXBYTE 0x7c
#define AR8236_STATS_TXOVERSIZE 0x80
#define AR8236_STATS_TXBYTE 0x84
#define AR8236_STATS_TXCOLLISION 0x8c
#define AR8236_STATS_TXABORTCOL 0x90
#define AR8236_STATS_TXMULTICOL 0x94
#define AR8236_STATS_TXSINGLECOL 0x98
#define AR8236_STATS_TXEXCDEFER 0x9c
#define AR8236_STATS_TXDEFER 0xa0
#define AR8236_STATS_TXLATECOL 0xa4
#define AR8327_NUM_PORTS 7 #define AR8327_NUM_PORTS 7
#define AR8327_NUM_PHYS 5 #define AR8327_NUM_PHYS 5
#define AR8327_PORTS_ALL 0x7f #define AR8327_PORTS_ALL 0x7f