add D-link DGL-5500 A1 support
Signed-off-by: Imre Kaloz <kaloz@openwrt.org> SVN-Revision: 43401
This commit is contained in:
parent
200c30b426
commit
974f286261
10 changed files with 252 additions and 0 deletions
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@ -49,6 +49,7 @@ get_status_led() {
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db120)
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status_led="db120:green:status"
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;;
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dgl-5500-a1 |\
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dhp-1565-a1|\
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dir-505-a1 |\
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dir-600-a1 |\
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@ -248,6 +248,7 @@ wzr-hp-g300nh)
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ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 5t"
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;;
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dgl-5500-a1 |\
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dir-825-c1)
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local mac
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ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
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@ -342,6 +342,9 @@ ar71xx_board_detect() {
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*"DB120 reference board")
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name="db120"
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;;
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*"DGL-5500 rev. A1")
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name="dgl-5500-a1"
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;;
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*"DHP-1565 rev. A1")
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name="dhp-1565-a1"
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;;
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37
target/linux/ar71xx/base-files/lib/preinit/82_patch_ath10k
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target/linux/ar71xx/base-files/lib/preinit/82_patch_ath10k
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@ -0,0 +1,37 @@
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#!/bin/sh
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. /lib/functions/system.sh
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. /lib/ar71xx.sh
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firmware_file="/lib/firmware/ath10k/QCA988X/hw2.0/firmware-3.bin"
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firmware_md5_orig="5163aa8de591f80b06c77f22e9777473"
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firmware_md5_current="$(md5sum $firmware_file)"
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firmware_md5_current="${firmware_md5_current%% *}"
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do_patch_ath10k_firmware() {
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# verify md5sum before patching
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[ "firmware_md5_orig" != "firmware_md5_current" ] || {
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return
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}
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# some boards have bogus mac in otp, patch the default mac in the firmware
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case $(ar71xx_board_name) in
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dgl-5500-a1)
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local mac
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mac=$(mtd_get_mac_ascii nvram wlan1_mac)
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cp $firmware_file /tmp/ath10k-firmware.bin
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macaddr_2bin $mac | dd of=/tmp/ath10k-firmware.bin \
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conv=notrunc bs=1 seek=280 count=6
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;;
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esac
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[ -f /tmp/ath10k-firmware.bin ] || {
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return
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}
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cp /tmp/ath10k-firmware.bin $firmware_file
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rm /tmp/ath10k-firmware.bin
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}
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boot_hook_add preinit_main do_patch_ath10k_firmware
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@ -194,6 +194,7 @@ platform_check_image() {
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ap81 | \
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ap83 | \
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ap132 | \
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dgl-5500-a1 |\
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dhp-1565-a1 |\
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dir-505-a1 | \
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dir-600-a1 | \
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@ -42,6 +42,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
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CONFIG_ATH79_MACH_CARAMBOLA2=y
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CONFIG_ATH79_MACH_CPE510=y
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CONFIG_ATH79_MACH_DB120=y
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CONFIG_ATH79_MACH_DGL_5500_A1=y
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CONFIG_ATH79_MACH_DHP_1565_A1=y
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CONFIG_ATH79_MACH_DIR_505_A1=y
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CONFIG_ATH79_MACH_DIR_600_A1=y
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150
target/linux/ar71xx/files/arch/mips/ath79/mach-dgl-5500-a1.c
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150
target/linux/ar71xx/files/arch/mips/ath79/mach-dgl-5500-a1.c
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@ -0,0 +1,150 @@
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/*
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* D-Link DGL-5500 board support
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*
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* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14
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#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19
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#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22
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#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23
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#define DGL_5500_A1_GPIO_BTN_WPS 16
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#define DGL_5500_A1_GPIO_BTN_RESET 17
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#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \
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(3 * DGL_5500_A1_KEYS_POLL_INTERVAL)
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#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000
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#define DGL_5500_A1_LAN_MAC_OFFSET 0x04
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#define DGL_5500_A1_WAN_MAC_OFFSET 0x16
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static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = {
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{
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.name = "d-link:green:power",
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.gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN,
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.active_low = 1,
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},
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{
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.name = "d-link:orange:power",
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.gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE,
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.active_low = 1,
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},
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{
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.name = "d-link:green:planet",
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.gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN,
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.active_low = 1,
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},
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{
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.name = "d-link:orange:planet",
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.gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DGL_5500_A1_GPIO_BTN_RESET,
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.active_low = 1,
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},
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DGL_5500_A1_GPIO_BTN_WPS,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = {
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/* Use the SGMII interface for the GMAC0 of the AR8327 switch */
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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static struct ar8327_platform_data dgl_5500_a1_ar8327_data = {
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.pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info dgl_5500_a1_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &dgl_5500_a1_ar8327_data,
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},
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};
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static void __init dgl_5500_a1_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 lan_mac[ETH_ALEN];
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ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio),
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dgl_5500_a1_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dgl_5500_a1_gpio_keys),
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dgl_5500_a1_gpio_keys);
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ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(dgl_5500_a1_mdio0_info,
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ARRAY_SIZE(dgl_5500_a1_mdio0_info));
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ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
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/* GMAC1 is connected to an AR8327N switch via the SMGII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.phy_mask = BIT(0);
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ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_register_eth(1);
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ath79_register_usb();
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ath79_register_pci();
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}
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MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1",
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dgl_5500_a1_setup);
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@ -126,3 +126,15 @@ define Profile/DIR835A1/Description
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endef
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$(eval $(call Profile,DIR835A1))
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define Profile/DGL5500A1
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NAME:=D-Link DGL-5500 rev. A1
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PACKAGES:=kmod-usb-core kmod-usb2 kmod-ath10k
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endef
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define Profile/DIR5500A1/Description
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Package set optimized for the D-Link DGL-5500 rev. A1.
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endef
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$(eval $(call Profile,DGL5500A1))
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@ -279,6 +279,7 @@ cap4200ag_mtdlayout=mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),320k(custom)ro,
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cpe510_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(pation-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware)
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eap300v2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom),13632k(firmware),2048k(failsafe),64k(art)ro
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db120_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1408k(kernel),64k(nvram),64k(art)ro,7744k@0x50000(firmware)
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dgl_5500_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,15296k(firmware),192k(lang)ro,512k(my-dlink)ro,64k(mac)ro,64k(art)ro
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cameo_ap94_mtdlayout=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,6208k(firmware),64k(caldata)ro,1600k(unknown)ro,64k@0x7f0000(caldata_copy)
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cameo_ap94_mtdlayout_fat=mtdparts=spi0.0:256k(uboot)ro,64k(config)ro,7808k(firmware),64k(caldata)ro,64k@0x660000(caldata_orig),6208k@0x50000(firmware_orig)
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esr900_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),13248k(rootfs),1024k(manufacture)ro,64k(backup)ro,320k(storage)ro,64k(caldata)ro,14656k@0x40000(firmware)
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@ -448,6 +449,10 @@ Image/Build/CameoAP99/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_ap99_mtd
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Image/Build/CameoAP99=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_ap99_mtdlayout),$(4),65536)
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Image/Build/CameoAP99/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_ap99_mtdlayout))
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Image/Build/CameoAP135/buildkernel=$(call MkuImageLzma,$(2),$(3) $(4))
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Image/Build/CameoAP135=$(call Image/Build/Cameo,$(1),$(2),$(3),$(4),$(5),26)
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Image/Build/CameoAP135/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(4))
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Image/Build/CameoDB120/buildkernel=$(call MkuImageLzma,$(2),$(3) $(cameo_db120_mtdlayout))
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Image/Build/CameoDB120=$(call Image/Build/Cameo,$(1),$(2),$(3),$(cameo_db120_mtdlayout),$(4),26)
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Image/Build/CameoDB120/initramfs=$(call MkuImageLzma/initramfs,$(2),$(3) $(cameo_db120_mtdlayout))
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@ -1160,6 +1165,8 @@ $(eval $(call SingleProfile,CameoAP121,64kraw-nojffs,TEW712BR,tew-712br,TEW-712B
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$(eval $(call SingleProfile,CameoAP121,64kraw-nojffs,DIR601B1,dir-601-b1,TEW-712BR,ttyATH0,115200,"HORNET-RT-DIR601B1-3",2.99.99,"" "NA"))
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$(eval $(call SingleProfile,CameoAP121_8M,64kraw-nojffs,DIR505A1,dir-505-a1,DIR-505-A1,ttyATH0,115200,"HORNET-PACKET-DIR505A1-3",1.99.99,""))
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$(eval $(call SingleProfile,CameoAP135,64kraw,DGL5500A1,dgl-5500-a1,DGL-5500-A1,ttyS0,115200,$$(dgl_5500_mtdlayout),"00AP135AR9558-RT-130508-00"))
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$(eval $(call SingleProfile,CameoDB120,64kraw,DHP1565A1,dhp-1565-a1,DHP-1565-A1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
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$(eval $(call SingleProfile,CameoDB120,64kraw,DIR825C1,dir-825-c1,DIR-825-C1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
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$(eval $(call SingleProfile,CameoDB120,64kraw,DIR835A1,dir-835-a1,DIR-835-A1,ttyS0,115200,"00DB120AR9344-RT-101214-00"))
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@ -0,0 +1,39 @@
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -40,6 +40,7 @@ enum ath79_mach_type {
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ATH79_MACH_CPE510, /* TP-LINK CPE510 */
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ATH79_MACH_DB120, /* Atheros DB120 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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+ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */
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ATH79_MACH_DHP_1565_A1, /* D-Link DHP-1565 rev. A1 */
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ATH79_MACH_DIR_505_A1, /* D-Link DIR-505 rev. A1 */
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ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -55,6 +55,7 @@ obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)
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obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
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obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
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obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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+obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o
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obj-$(CONFIG_ATH79_MACH_DHP_1565_A1) += mach-dhp-1565-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -293,6 +293,16 @@ config ATH79_MACH_WPE72
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select ATH79_DEV_USB
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select MYLOADER
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+config ATH79_MACH_DGL_5500_A1
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+ bool "D-Link DGL-5500 A1 support"
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+ select SOC_QCA955X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_WMAC
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+ select ATH79_DEV_USB
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+
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config ATH79_MACH_DHP_1565_A1
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bool "D-Link DHP-1565 rev. A1 board support"
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select SOC_AR934X
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