target/linux: Add support for cores with slow WDT clock like bcm5354. (thank you Aleksandar Radovanovic)
SVN-Revision: 23415
This commit is contained in:
Alexandros C. Couloumbis
parent
e37cba7e95
commit
867f200156
4 changed files with 356 additions and 0 deletions
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@ -0,0 +1,89 @@
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--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -31,6 +31,7 @@
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#define WDT_DEFAULT_TIME 30 /* seconds */
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#define WDT_MAX_TIME 255 /* seconds */
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+#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
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static int wdt_time = WDT_DEFAULT_TIME;
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static int nowayout = WATCHDOG_NOWAYOUT;
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@@ -50,11 +51,11 @@ static unsigned long bcm47xx_wdt_busy;
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static char expect_release;
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static struct timer_list wdt_timer;
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static atomic_t ticks;
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+static int needs_sw_scale;
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-static inline void bcm47xx_wdt_hw_start(void)
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+static inline void bcm47xx_wdt_hw_start(u32 ticks)
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{
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- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
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+ ssb_watchdog_timer_set(&ssb_bcm47xx, ticks);
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}
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static inline int bcm47xx_wdt_hw_stop(void)
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@@ -65,33 +66,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
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static void bcm47xx_timer_tick(unsigned long unused)
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{
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if (!atomic_dec_and_test(&ticks)) {
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- bcm47xx_wdt_hw_start();
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+ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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+ bcm47xx_wdt_hw_start(0xfffffff);
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mod_timer(&wdt_timer, jiffies + HZ);
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} else {
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- printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
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+ printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
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}
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}
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-static inline void bcm47xx_wdt_pet(void)
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+static void bcm47xx_wdt_pet(void)
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{
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- atomic_set(&ticks, wdt_time);
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+ if(needs_sw_scale)
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+ atomic_set(&ticks, wdt_time);
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+ else
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+ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
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}
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static void bcm47xx_wdt_start(void)
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{
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bcm47xx_wdt_pet();
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- bcm47xx_timer_tick(0);
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-}
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-
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-static void bcm47xx_wdt_pause(void)
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-{
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- del_timer_sync(&wdt_timer);
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- bcm47xx_wdt_hw_stop();
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+ if(needs_sw_scale)
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+ bcm47xx_timer_tick(0);
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}
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static void bcm47xx_wdt_stop(void)
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{
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- bcm47xx_wdt_pause();
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+ if(needs_sw_scale)
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+ del_timer_sync(&wdt_timer);
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+ bcm47xx_wdt_hw_stop();
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}
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static int bcm47xx_wdt_settimeout(int new_time)
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@@ -243,7 +245,15 @@ static int __init bcm47xx_wdt_init(void)
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if (bcm47xx_wdt_hw_stop() < 0)
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return -ENODEV;
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- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ /* FIXME Other cores */
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+ if(ssb_bcm47xx.chip_id == 0x5354) {
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+ /* Slow WDT clock, no pre-scaling */
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+ needs_sw_scale = 0;
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+ } else {
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+ /* Fast WDT clock, needs software pre-scaling */
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+ needs_sw_scale = 1;
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+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ }
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if (bcm47xx_wdt_settimeout(wdt_time)) {
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bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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@ -0,0 +1,89 @@
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--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -31,6 +31,7 @@
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#define WDT_DEFAULT_TIME 30 /* seconds */
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#define WDT_MAX_TIME 255 /* seconds */
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+#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
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static int wdt_time = WDT_DEFAULT_TIME;
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static int nowayout = WATCHDOG_NOWAYOUT;
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@@ -50,11 +51,11 @@ static unsigned long bcm47xx_wdt_busy;
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static char expect_release;
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static struct timer_list wdt_timer;
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static atomic_t ticks;
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+static int needs_sw_scale;
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-static inline void bcm47xx_wdt_hw_start(void)
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+static inline void bcm47xx_wdt_hw_start(u32 ticks)
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{
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- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
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+ ssb_watchdog_timer_set(&ssb_bcm47xx, ticks);
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}
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static inline int bcm47xx_wdt_hw_stop(void)
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@@ -65,33 +66,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
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static void bcm47xx_timer_tick(unsigned long unused)
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{
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if (!atomic_dec_and_test(&ticks)) {
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- bcm47xx_wdt_hw_start();
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+ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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+ bcm47xx_wdt_hw_start(0xfffffff);
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mod_timer(&wdt_timer, jiffies + HZ);
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} else {
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- printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
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+ printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
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}
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}
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-static inline void bcm47xx_wdt_pet(void)
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+static void bcm47xx_wdt_pet(void)
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{
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- atomic_set(&ticks, wdt_time);
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+ if(needs_sw_scale)
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+ atomic_set(&ticks, wdt_time);
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+ else
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+ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
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}
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static void bcm47xx_wdt_start(void)
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{
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bcm47xx_wdt_pet();
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- bcm47xx_timer_tick(0);
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-}
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-
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-static void bcm47xx_wdt_pause(void)
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-{
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- del_timer_sync(&wdt_timer);
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- bcm47xx_wdt_hw_stop();
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+ if(needs_sw_scale)
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+ bcm47xx_timer_tick(0);
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}
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static void bcm47xx_wdt_stop(void)
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{
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- bcm47xx_wdt_pause();
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+ if(needs_sw_scale)
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+ del_timer_sync(&wdt_timer);
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+ bcm47xx_wdt_hw_stop();
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}
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static int bcm47xx_wdt_settimeout(int new_time)
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@@ -243,7 +245,15 @@ static int __init bcm47xx_wdt_init(void)
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if (bcm47xx_wdt_hw_stop() < 0)
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return -ENODEV;
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- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ /* FIXME Other cores */
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+ if(ssb_bcm47xx.chip_id == 0x5354) {
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+ /* Slow WDT clock, no pre-scaling */
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+ needs_sw_scale = 0;
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+ } else {
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+ /* Fast WDT clock, needs software pre-scaling */
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+ needs_sw_scale = 1;
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+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ }
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if (bcm47xx_wdt_settimeout(wdt_time)) {
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bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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@ -0,0 +1,89 @@
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--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -31,6 +31,7 @@
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#define WDT_DEFAULT_TIME 30 /* seconds */
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#define WDT_MAX_TIME 255 /* seconds */
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+#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
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static int wdt_time = WDT_DEFAULT_TIME;
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static int nowayout = WATCHDOG_NOWAYOUT;
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@@ -50,11 +51,11 @@ static unsigned long bcm47xx_wdt_busy;
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static char expect_release;
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static struct timer_list wdt_timer;
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static atomic_t ticks;
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+static int needs_sw_scale;
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-static inline void bcm47xx_wdt_hw_start(void)
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+static inline void bcm47xx_wdt_hw_start(u32 ticks)
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{
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- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
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+ ssb_watchdog_timer_set(&ssb_bcm47xx, ticks);
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}
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static inline int bcm47xx_wdt_hw_stop(void)
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@@ -65,33 +66,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
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static void bcm47xx_timer_tick(unsigned long unused)
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{
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if (!atomic_dec_and_test(&ticks)) {
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- bcm47xx_wdt_hw_start();
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+ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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+ bcm47xx_wdt_hw_start(0xfffffff);
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mod_timer(&wdt_timer, jiffies + HZ);
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} else {
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- printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
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+ printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
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}
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}
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-static inline void bcm47xx_wdt_pet(void)
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+static void bcm47xx_wdt_pet(void)
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{
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- atomic_set(&ticks, wdt_time);
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+ if(needs_sw_scale)
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+ atomic_set(&ticks, wdt_time);
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+ else
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+ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
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}
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static void bcm47xx_wdt_start(void)
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{
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bcm47xx_wdt_pet();
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- bcm47xx_timer_tick(0);
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-}
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-
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-static void bcm47xx_wdt_pause(void)
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-{
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- del_timer_sync(&wdt_timer);
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- bcm47xx_wdt_hw_stop();
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+ if(needs_sw_scale)
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+ bcm47xx_timer_tick(0);
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}
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static void bcm47xx_wdt_stop(void)
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{
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- bcm47xx_wdt_pause();
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+ if(needs_sw_scale)
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+ del_timer_sync(&wdt_timer);
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+ bcm47xx_wdt_hw_stop();
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}
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static int bcm47xx_wdt_settimeout(int new_time)
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@@ -243,7 +245,15 @@ static int __init bcm47xx_wdt_init(void)
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if (bcm47xx_wdt_hw_stop() < 0)
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return -ENODEV;
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- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ /* FIXME Other cores */
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+ if(ssb_bcm47xx.chip_id == 0x5354) {
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+ /* Slow WDT clock, no pre-scaling */
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+ needs_sw_scale = 0;
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+ } else {
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+ /* Fast WDT clock, needs software pre-scaling */
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+ needs_sw_scale = 1;
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+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ }
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if (bcm47xx_wdt_settimeout(wdt_time)) {
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bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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@ -0,0 +1,89 @@
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--- a/drivers/watchdog/bcm47xx_wdt.c
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+++ b/drivers/watchdog/bcm47xx_wdt.c
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@@ -31,6 +31,7 @@
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#define WDT_DEFAULT_TIME 30 /* seconds */
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#define WDT_MAX_TIME 255 /* seconds */
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+#define WDT_SHIFT 15 /* 32.768 KHz on cores with slow WDT clock */
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static int wdt_time = WDT_DEFAULT_TIME;
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static int nowayout = WATCHDOG_NOWAYOUT;
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@@ -50,11 +51,11 @@ static unsigned long bcm47xx_wdt_busy;
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static char expect_release;
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static struct timer_list wdt_timer;
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static atomic_t ticks;
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+static int needs_sw_scale;
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-static inline void bcm47xx_wdt_hw_start(void)
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+static inline void bcm47xx_wdt_hw_start(u32 ticks)
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{
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- /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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- ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff);
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+ ssb_watchdog_timer_set(&ssb_bcm47xx, ticks);
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}
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static inline int bcm47xx_wdt_hw_stop(void)
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@@ -65,33 +66,34 @@ static inline int bcm47xx_wdt_hw_stop(vo
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static void bcm47xx_timer_tick(unsigned long unused)
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{
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if (!atomic_dec_and_test(&ticks)) {
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- bcm47xx_wdt_hw_start();
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+ /* This is 2,5s on 100Mhz clock and 2s on 133 Mhz */
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+ bcm47xx_wdt_hw_start(0xfffffff);
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mod_timer(&wdt_timer, jiffies + HZ);
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} else {
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- printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n");
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+ printk(KERN_CRIT DRV_NAME ": Watchdog will fire soon!!!\n");
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}
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}
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-static inline void bcm47xx_wdt_pet(void)
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+static void bcm47xx_wdt_pet(void)
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{
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- atomic_set(&ticks, wdt_time);
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+ if(needs_sw_scale)
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+ atomic_set(&ticks, wdt_time);
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+ else
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+ bcm47xx_wdt_hw_start(wdt_time << WDT_SHIFT);
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}
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static void bcm47xx_wdt_start(void)
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{
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bcm47xx_wdt_pet();
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- bcm47xx_timer_tick(0);
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-}
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-
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-static void bcm47xx_wdt_pause(void)
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-{
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- del_timer_sync(&wdt_timer);
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- bcm47xx_wdt_hw_stop();
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+ if(needs_sw_scale)
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+ bcm47xx_timer_tick(0);
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}
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static void bcm47xx_wdt_stop(void)
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{
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- bcm47xx_wdt_pause();
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+ if(needs_sw_scale)
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+ del_timer_sync(&wdt_timer);
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+ bcm47xx_wdt_hw_stop();
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}
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static int bcm47xx_wdt_settimeout(int new_time)
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@@ -243,7 +245,15 @@ static int __init bcm47xx_wdt_init(void)
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if (bcm47xx_wdt_hw_stop() < 0)
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return -ENODEV;
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- setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ /* FIXME Other cores */
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+ if(ssb_bcm47xx.chip_id == 0x5354) {
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+ /* Slow WDT clock, no pre-scaling */
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+ needs_sw_scale = 0;
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+ } else {
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+ /* Fast WDT clock, needs software pre-scaling */
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+ needs_sw_scale = 1;
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+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L);
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+ }
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if (bcm47xx_wdt_settimeout(wdt_time)) {
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bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME);
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