ramips: add jumbo frame support for v4.9
Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
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9bc9457b85
commit
7f9143168f
4 changed files with 27 additions and 12 deletions
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@ -47,6 +47,12 @@
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#define GSW_REG_ISR 0x700c
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#define GSW_REG_GPC1 0x7014
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#define GSW_REG_MAC_P0_MCR 0x100
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#define GSW_REG_MAC_P1_MCR 0x200
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// Global MAC control register
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#define GSW_REG_GMACCR 0x30E0
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#define SYSC_REG_CHIP_REV_ID 0x0c
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#define SYSC_REG_CFG1 0x14
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#define RST_CTRL_MCM BIT(2)
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@ -100,16 +100,19 @@ static void mt7621_hw_init(struct mt7620_gsw *gsw, struct device_node *np)
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if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) {
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/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
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mtk_switch_w32(gsw, 0x2105e30b, 0x100);
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mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR);
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mt7530_mdio_w32(gsw, 0x3600, 0x5e30b);
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} else {
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/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
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mtk_switch_w32(gsw, 0x2105e33b, 0x100);
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mtk_switch_w32(gsw, 0x2305e33b, GSW_REG_MAC_P0_MCR);
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mt7530_mdio_w32(gsw, 0x3600, 0x5e33b);
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}
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/* (GE2, Link down) */
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mtk_switch_w32(gsw, 0x8000, 0x200);
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mtk_switch_w32(gsw, 0x8000, GSW_REG_MAC_P1_MCR);
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/* Set switch max RX frame length to 2k */
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mt7530_mdio_w32(gsw, GSW_REG_GMACCR, 0x3F0B);
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/* Enable Port 6, P5 as GMAC5, P5 disable */
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val = mt7530_mdio_r32(gsw, 0x7804);
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@ -1350,6 +1350,10 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
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if (!(priv->flags & FE_FLAG_JUMBO_FRAME))
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return eth_change_mtu(dev, new_mtu);
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if (IS_ENABLED(CONFIG_SOC_MT7621))
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if (new_mtu > 2048)
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return -EINVAL;
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frag_size = fe_max_frag_size(new_mtu);
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if (new_mtu < 68 || frag_size > PAGE_SIZE)
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return -EINVAL;
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@ -1373,15 +1377,17 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
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return 0;
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fe_stop(dev);
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fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
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if (new_mtu <= ETH_DATA_LEN) {
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fwd_cfg &= ~FE_GDM1_JMB_EN;
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} else {
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fwd_cfg &= ~(FE_GDM1_JMB_LEN_MASK << FE_GDM1_JMB_LEN_SHIFT);
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fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) <<
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FE_GDM1_JMB_LEN_SHIFT) | FE_GDM1_JMB_EN;
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if (!IS_ENABLED(CONFIG_SOC_MT7621)) {
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fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
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if (new_mtu <= ETH_DATA_LEN) {
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fwd_cfg &= ~FE_GDM1_JMB_EN;
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} else {
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fwd_cfg &= ~(FE_GDM1_JMB_LEN_MASK << FE_GDM1_JMB_LEN_SHIFT);
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fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) <<
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FE_GDM1_JMB_LEN_SHIFT) | FE_GDM1_JMB_EN;
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}
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fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
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}
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fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
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return fe_open(dev);
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}
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@ -139,7 +139,7 @@ static void mt7621_init_data(struct fe_soc_data *data,
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priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET |
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FE_FLAG_RX_SG_DMA | FE_FLAG_NAPI_WEIGHT |
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FE_FLAG_HAS_SWITCH;
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FE_FLAG_HAS_SWITCH | FE_FLAG_JUMBO_FRAME;
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netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
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NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_SG | NETIF_F_TSO |
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