ramips: add jumbo frame support for v4.9

Signed-off-by: John Crispin <john@phrozen.org>
This commit is contained in:
John Crispin 2017-06-01 12:29:40 +02:00
parent 9bc9457b85
commit 7f9143168f
4 changed files with 27 additions and 12 deletions

View file

@ -47,6 +47,12 @@
#define GSW_REG_ISR 0x700c
#define GSW_REG_GPC1 0x7014
#define GSW_REG_MAC_P0_MCR 0x100
#define GSW_REG_MAC_P1_MCR 0x200
// Global MAC control register
#define GSW_REG_GMACCR 0x30E0
#define SYSC_REG_CHIP_REV_ID 0x0c
#define SYSC_REG_CFG1 0x14
#define RST_CTRL_MCM BIT(2)

View file

@ -100,16 +100,19 @@ static void mt7621_hw_init(struct mt7620_gsw *gsw, struct device_node *np)
if ((rt_sysc_r32(SYSC_REG_CHIP_REV_ID) & 0xFFFF) == 0x0101) {
/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
mtk_switch_w32(gsw, 0x2105e30b, 0x100);
mtk_switch_w32(gsw, 0x2305e30b, GSW_REG_MAC_P0_MCR);
mt7530_mdio_w32(gsw, 0x3600, 0x5e30b);
} else {
/* (GE1, Force 1000M/FD, FC ON, MAX_RX_LENGTH 1536) */
mtk_switch_w32(gsw, 0x2105e33b, 0x100);
mtk_switch_w32(gsw, 0x2305e33b, GSW_REG_MAC_P0_MCR);
mt7530_mdio_w32(gsw, 0x3600, 0x5e33b);
}
/* (GE2, Link down) */
mtk_switch_w32(gsw, 0x8000, 0x200);
mtk_switch_w32(gsw, 0x8000, GSW_REG_MAC_P1_MCR);
/* Set switch max RX frame length to 2k */
mt7530_mdio_w32(gsw, GSW_REG_GMACCR, 0x3F0B);
/* Enable Port 6, P5 as GMAC5, P5 disable */
val = mt7530_mdio_r32(gsw, 0x7804);

View file

@ -1350,6 +1350,10 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
if (!(priv->flags & FE_FLAG_JUMBO_FRAME))
return eth_change_mtu(dev, new_mtu);
if (IS_ENABLED(CONFIG_SOC_MT7621))
if (new_mtu > 2048)
return -EINVAL;
frag_size = fe_max_frag_size(new_mtu);
if (new_mtu < 68 || frag_size > PAGE_SIZE)
return -EINVAL;
@ -1373,15 +1377,17 @@ static int fe_change_mtu(struct net_device *dev, int new_mtu)
return 0;
fe_stop(dev);
fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
if (new_mtu <= ETH_DATA_LEN) {
fwd_cfg &= ~FE_GDM1_JMB_EN;
} else {
fwd_cfg &= ~(FE_GDM1_JMB_LEN_MASK << FE_GDM1_JMB_LEN_SHIFT);
fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) <<
FE_GDM1_JMB_LEN_SHIFT) | FE_GDM1_JMB_EN;
if (!IS_ENABLED(CONFIG_SOC_MT7621)) {
fwd_cfg = fe_r32(FE_GDMA1_FWD_CFG);
if (new_mtu <= ETH_DATA_LEN) {
fwd_cfg &= ~FE_GDM1_JMB_EN;
} else {
fwd_cfg &= ~(FE_GDM1_JMB_LEN_MASK << FE_GDM1_JMB_LEN_SHIFT);
fwd_cfg |= (DIV_ROUND_UP(frag_size, 1024) <<
FE_GDM1_JMB_LEN_SHIFT) | FE_GDM1_JMB_EN;
}
fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
}
fe_w32(fwd_cfg, FE_GDMA1_FWD_CFG);
return fe_open(dev);
}

View file

@ -139,7 +139,7 @@ static void mt7621_init_data(struct fe_soc_data *data,
priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_RX_2B_OFFSET |
FE_FLAG_RX_SG_DMA | FE_FLAG_NAPI_WEIGHT |
FE_FLAG_HAS_SWITCH;
FE_FLAG_HAS_SWITCH | FE_FLAG_JUMBO_FRAME;
netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_SG | NETIF_F_TSO |