add external irq
SVN-Revision: 21201
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7287be04b0
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2 changed files with 21 additions and 0 deletions
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@ -203,6 +203,23 @@
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#define IFXMIPS_ICU_OFFSET (IFXMIPS_ICU_IM1_ISR - IFXMIPS_ICU_IM0_ISR)
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/* EIU - external interrupt controller */
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/** EIU - base address */
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#define IFXMIPS_EIU_BASE_ADDR 0xBF101000
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/** EIU - control register */
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#define IFXMIPS_EIU_EXIN_C ((u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x0000))
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/** EIU - interrupt node interrupt capture */
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#define IFXMIPS_EIU_INIC ((u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x0004))
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/** EIU - interrupt node control */
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#define IFXMIPS_EIU_INC ((u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x0008))
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/** EIU - interrupt node enable */
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#define IFXMIPS_EIU_INEN ((u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x000C))
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/** NMI - control */
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#define IFXMIPS_NMI_CR ((u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x00F0))
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/** NMI - status */
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#define IFXMIPS_NMI_SR (( u32 *)(IFXMIPS_EIU_BASE_ADDR + 0x00F4))
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/*------------ ETOP */
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@ -72,6 +72,10 @@
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#define IFXMIPS_USB_INT (INT_NUM_IM4_IRL0 + 22)
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#define IFXMIPS_USB_OC_INT (INT_NUM_IM4_IRL0 + 23)
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#define IFXMIPS_EIU_IR0 (INT_NUM_IM4_IRL0 + 30)
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#define IFXMIPS_EIU_IR1 (INT_NUM_IM3_IRL0 + 31)
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#define IFXMIPS_EIU_IR2 (INT_NUM_IM1_IRL0 + 26)
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extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr);
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