layerscape: fix ls1046ardb 32-bit call trace

Enabled CONFIG_ARCH_DMA_ADDR_T_64BIT in kernel to
resolve below call trace when ls1046ardb 32-bit
started up kernel.

[    0.142141] Bman ver:0a02,02,01
[    0.145326] ------------[ cut here ]------------
[    0.149969] WARNING: CPU: 0 PID: 1 at arch/arm/mm/ioremap.c:303 __arm_ioremap_pfn_caller+0x1ac/0x1d8
[    0.159152] Modules linked in:
[    0.162216] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.51-g9c76e024 #2
[    0.169036] Hardware name: Generic DT based system
[    0.173853] [<c02236a4>] (unwind_backtrace) from [<c021ed94>] (show_stack+0x10/0x14)
[    0.181638] [<c021ed94>] (show_stack) from [<c04d2d38>] (dump_stack+0x98/0xac)
[    0.188899] [<c04d2d38>] (dump_stack) from [<c0245bcc>] (__warn+0xe4/0x100)
[    0.195896] [<c0245bcc>] (__warn) from [<c0245c98>] (warn_slowpath_null+0x20/0x28)
[    0.203504] [<c0245c98>] (warn_slowpath_null) from [<c0229e24>] (__arm_ioremap_pfn_caller+0x1ac/0x1d8)
[    0.212861] [<c0229e24>] (__arm_ioremap_pfn_caller) from [<c0229f0c>] (ioremap_cache+0x20/0x28)
[    0.221608] [<c0229f0c>] (ioremap_cache) from [<c105e390>] (parse_mem_property.part.3+0x18/0x50)
[    0.230441] [<c105e390>] (parse_mem_property.part.3) from [<c105e6dc>] (qman_init_early+0x314/0x334)
[    0.239623] [<c105e6dc>] (qman_init_early) from [<c0201a24>] (do_one_initcall+0xb4/0x168)
[    0.247844] [<c0201a24>] (do_one_initcall) from [<c1000e84>] (kernel_init_freeable+0x1d8/0x280)
[    0.256590] [<c1000e84>] (kernel_init_freeable) from [<c0adbcfc>] (kernel_init+0x8/0x114)
[    0.264812] [<c0adbcfc>] (kernel_init) from [<c021bb28>] (ret_from_fork+0x14/0x2c)
[    0.272423] ---[ end trace 39aaeef329e2a0a2 ]---
[    0.277058] qman-fqd addr 0xfb000000 size 0x800000

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
This commit is contained in:
Yangbo Lu 2017-10-20 17:40:35 +08:00 committed by John Crispin
parent 110c9e9034
commit 669c02d46d
2 changed files with 30 additions and 0 deletions

View file

@ -10,6 +10,7 @@ CONFIG_APDS9802ALS=y
CONFIG_AQUANTIA_PHY=y
# CONFIG_ARCH_AXXIA is not set
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HAS_BANDGAP=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
@ -936,6 +937,7 @@ CONFIG_PCIEASPM_DEFAULT=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_PME=y
CONFIG_PCI_BUS_ADDR_T_64BIT=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
# CONFIG_PCI_DRA7XX is not set

View file

@ -0,0 +1,28 @@
From c079739fa1101dcf7a1e40a195e019065e327d15 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Fri, 20 Oct 2017 16:45:17 +0800
Subject: [PATCH] arm: imx: select ARCH_DMA_ADDR_T_64BIT for LPAE
Selected ARCH_DMA_ADDR_T_64BIT for LPAE since
hardware could support it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
arch/arm/mach-imx/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 9155b639..3ded3f98 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,7 @@
menuconfig ARCH_MXC
bool "Freescale i.MX family"
depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M
+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_IMX_GPT
select GENERIC_IRQ_CHIP
--
2.14.1