uboot-sunxi: add u-boot DT for NanoPi NEO Plus2 board
u-boot upstream commit 6130b1f6bc23 Signed-off-by: Antony Antony <antony@phenome.org>
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From 77f54e8698001d8a987f2aa4870f71b65dc089eb Mon Sep 17 00:00:00 2001
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In-Reply-To: <20170921152217.4011-1-antony@phenome.org>
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References: <20170921152217.4011-1-antony@phenome.org>
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From: Antony Antony <antony@phenome.org>
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Date: Thu, 21 Sep 2017 13:34:07 +0200
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Subject: [PATCH v5 1/2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
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Add initial DT for NanoPi NEO Plus2 by FriendlyARM
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- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
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- 1 GB DDR3 RAM
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- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
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- micro SD card slot
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- Gigabit Ethernet (external RTL8211E-VB-CG chip)
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- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
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- 2x USB 2.0 host ports
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Signed-off-by: Antony Antony <antony@phenome.org>
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 106 ++++++++++++++++++++++++++++
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configs/nanopi_neo_plus2_defconfig | 18 +++++
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3 files changed, 125 insertions(+)
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create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
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create mode 100644 configs/nanopi_neo_plus2_defconfig
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -329,6 +329,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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sun8i-v3s-licheepi-zero.dtb
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-nanopi-neo2.dtb \
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+ sun50i-h5-nanopi-neo-plus2.dtb \
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sun50i-h5-orangepi-pc2.dtb \
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sun50i-h5-orangepi-prime.dtb \
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sun50i-h5-orangepi-zero-plus2.dtb
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--- /dev/null
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+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
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@@ -0,0 +1,106 @@
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+/*
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+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
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+ * Copyright (c) 2016 ARM Ltd.
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+
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+#include "sun50i-h5.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+
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+/ {
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+ model = "FriendlyARM NanoPi NEO Plus 2";
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+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
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+
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+ aliases {
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+ serial0 = &uart0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ reg_vcc3v3: vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+};
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+
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+&ehci1 {
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+ status = "okay";
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <4>;
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+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
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+ cd-inverted;
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+ status = "okay";
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+};
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+
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+&mmc2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc2_8bit_pins>;
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+ vmmc-supply = <®_vcc3v3>;
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+ bus-width = <8>;
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+ non-removable;
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+ cap-mmc-hw-reset;
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+ status = "okay";
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+};
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+
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+&ohci1 {
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+ status = "okay";
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins_a>;
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ status = "okay";
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+};
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--- /dev/null
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+++ b/configs/nanopi_neo_plus2_defconfig
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@@ -0,0 +1,18 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_SUNXI=y
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+CONFIG_MACH_SUN50I_H5=y
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+CONFIG_DRAM_CLK=408
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+CONFIG_DRAM_ZQ=3881977
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+CONFIG_MACPWR="PD6"
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+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2"
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+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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+CONFIG_SPL=y
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+# CONFIG_CMD_IMLS is not set
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+# CONFIG_CMD_FLASH is not set
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+# CONFIG_CMD_FPGA is not set
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+# CONFIG_SPL_DOS_PARTITION is not set
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+# CONFIG_SPL_ISO_PARTITION is not set
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+# CONFIG_SPL_EFI_PARTITION is not set
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+CONFIG_SUN8I_EMAC=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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