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imx6: update upstream pcie patches

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Signed-off-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 38298
This commit is contained in:
Luka Perkov 2013-10-03 13:06:42 +00:00
parent 5617993e10
commit 60dd4429b7
16 changed files with 130 additions and 118 deletions
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2
target/linux/imx6/patches-3.10/0001-usb-chipidea-improve-kconfig.patch
View file

@ -1,6 +1,4 @@
From 20a677fd63c57edd5b0c463baa44f133b2f2d4a0 Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@freescale.com>
Date: Thu, 13 Jun 2013 17:59:52 +0300
Subject: [PATCH] usb: chipidea: improve kconfig
Randy Dunlap <rdunlap@infradead.org> reported this problem

2
target/linux/imx6/patches-3.10/0002-usb-chipidea-fix-the-build-error-with-randconfig.patch
View file

@ -1,6 +1,4 @@
From 972a6c5d56b42d6dd326867d5974ffa58383ec53 Mon Sep 17 00:00:00 2001
From: Peter Chen <peter.chen@freescale.com>
Date: Mon, 29 Jul 2013 13:09:57 +0300
Subject: [PATCH] usb: chipidea: fix the build error with randconfig
Using below configs, the compile will have error:

2
target/linux/imx6/patches-3.10/0003-usb-chipidea-improve-kconfig-2.0.patch
View file

@ -1,6 +1,4 @@
From a0cfdc6bc73bc47b63b05b850cf66cf67f2487bf Mon Sep 17 00:00:00 2001
From: Lothar Waßmann <LW@KARO-electronics.de>
Date: Wed, 14 Aug 2013 12:43:58 +0300
Subject: [PATCH] usb: chipidea: improve kconfig 2.0
This patch provides a cleaner solution to the problem described in

2
target/linux/imx6/patches-3.10/0004-i2c-imx-retry-on-NAK.patch
View file

@ -1,6 +1,4 @@
From 0d1ee1f265cf9730feb214ddd18bc430c0800e8b Mon Sep 17 00:00:00 2001
From: Tim Harvey <tharvey@gateworks.com>
Date: Tue, 10 Sep 2013 21:42:29 +0200
Subject: [PATCH] i2c: imx: retry on NAK
In case of busy i2c try again to get ACK.

2
target/linux/imx6/patches-3.10/0005-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch
View file

@ -1,6 +1,4 @@
From 9e54eae23bc9cca0d8a955018c35b1250e09a73a Mon Sep 17 00:00:00 2001
From: Richard Zhu <r65037@freescale.com>
Date: Wed, 24 Jul 2013 14:15:29 +0800
Subject: [PATCH] ahci_imx: add ahci sata support on imx platforms
imx6q contains one Synopsys AHCI SATA controller, But it can't share

2
target/linux/imx6/patches-3.10/0006-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch
View file

@ -1,6 +1,4 @@
From 6a6c21ef487be47b300a0b24cd6afeb69d8b9a1a Mon Sep 17 00:00:00 2001
From: Richard Zhu <r65037@freescale.com>
Date: Wed, 24 Jul 2013 14:15:28 +0800
Subject: [PATCH] ARM: imx6q: update the sata bits definitions of gpr13
Replace the SATA_PHY_# by the more readable definitons.

2
target/linux/imx6/patches-3.10/0007-ARM-dtsi-enable-ahci-sata-on-imx6q-platforms.patch
View file

@ -1,6 +1,4 @@
From 0fb1f804269e549b556b475c8655bc862c220622 Mon Sep 17 00:00:00 2001
From: Richard Zhu <r65037@freescale.com>
Date: Tue, 16 Jul 2013 11:28:46 +0800
Subject: [PATCH] ARM: dtsi: enable ahci sata on imx6q platforms
Only imx6q has the ahci sata controller, enable

2
target/linux/imx6/patches-3.10/0008-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch
View file

@ -1,6 +1,4 @@
From 867974fc09f93bdd7f98d46ac3733934486bbf4a Mon Sep 17 00:00:00 2001
From: Tejun Heo <tj@kernel.org>
Date: Fri, 26 Jul 2013 08:57:56 -0400
Subject: [PATCH] ahci_imx: depend on CONFIG_MFD_SYSCON
ahci_imx makes use of regmap but the dependency wasn't specified in

4
target/linux/imx6/patches-3.10/0011-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch → target/linux/imx6/patches-3.10/0010-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch
View file

@ -1,9 +1,11 @@
Subject: [v6,2/3] ARM: imx6q: Add PCIe bits to GPR syscon definition
From: Sean Cross <xobs@kosagi.com>
Subject: [PATCH 1/2] ARM: imx6q: Add PCIe bits to GPR syscon definition
PCIe requires additional bits be defined for GPR8 and GPR12.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++
1 file changed, 8 insertions(+)

84
target/linux/imx6/patches-3.10/0012-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch → target/linux/imx6/patches-3.10/0011-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch
View file

@ -1,71 +1,20 @@
Subject: [v6,3/3] PCI: imx6: Add support for i.MX6 PCIe controller
Subject: [PATCH 2/2] PCI: imx6: Add support for i.MX6 PCIe controller
From: Sean Cross <xobs@kosagi.com>
Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx6qdl.dtsi | 16 +
arch/arm/mach-imx/Kconfig | 2 +
arch/arm/mach-imx/clk-imx6q.c | 4 +
drivers/pci/host/Kconfig | 6 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-imx6.c | 576 ++++++++++++++++++++
7 files changed, 611 insertions(+), 1 deletion(-)
drivers/pci/host/pci-imx6.c | 575 +++++++++++++++++++++
4 files changed, 588 insertions(+), 1 deletion(-)
create mode 100644 drivers/pci/host/pci-imx6.c
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -108,6 +108,22 @@
cache-level = <2>;
};
+ pcie: pcie@0x01000000 {
+ compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
+ reg = <0x01ffc000 0x4000>; /* DBI */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
+ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ interrupts = <0 123 0x04>;
+ clocks = <&clks 189>, <&clks 187>, <&clks 205>, <&clks 144>;
+ clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
+ status = "disabled";
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 0x04>;
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -806,6 +806,8 @@ config SOC_IMX6Q
select HAVE_IMX_SRC
select HAVE_SMP
select MFD_SYSCON
+ select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
select PINCTRL
select PINCTRL_IMX6Q
select PL310_ERRATA_588369 if CACHE_PL310
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -586,6 +586,10 @@ int __init mx6q_clocks_init(void)
clk_prepare_enable(clk[usbphy2_gate]);
}
+ /* All existing boards with PCIe use LVDS1 */
+ if (IS_ENABLED(CONFIG_PCI_IMX6))
+ clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
+
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
--- /dev/null
+++ b/drivers/pci/host/Kconfig
@@ -0,0 +1,13 @@
@ -89,7 +38,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+obj-$(CONFIG_PCI_IMX6) += pci-imx6.o
--- /dev/null
+++ b/drivers/pci/host/pci-imx6.c
@@ -0,0 +1,576 @@
@@ -0,0 +1,575 @@
+/*
+ * PCIe host controller driver for Freescale i.MX6 SoCs
+ *
@ -173,7 +122,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ return 0;
+
+ udelay(1);
+ } while ((wait_counter < max_iterations) && (val != exp_val));
+ } while (wait_counter < max_iterations);
+
+ return -ETIMEDOUT;
+}
@ -260,7 +209,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ var = data << PCIE_PHY_CTRL_DATA_LOC;
+ writel(var, dbi_base + PCIE_PHY_CTRL);
+
+ /* wait for ack de-assetion */
+ /* wait for ack de-assertion */
+ ret = pcie_phy_poll_ack(dbi_base, 0);
+ if (ret)
+ return ret;
@ -278,7 +227,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ var = data << PCIE_PHY_CTRL_DATA_LOC;
+ writel(var, dbi_base + PCIE_PHY_CTRL);
+
+ /* wait for ack de-assetion */
+ /* wait for ack de-assertion */
+ ret = pcie_phy_poll_ack(dbi_base, 0);
+ if (ret)
+ return ret;
@ -454,8 +403,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ if (ltssm != 0x0d)
+ return 0;
+
+ dev_err(pp->dev,
+ "transition to gen2 is stuck, reset PHY!\n");
+ dev_err(pp->dev, "transition to gen2 is stuck, reset PHY!\n");
+
+ pcie_phy_read(pp->dbi_base,
+ PHY_RX_OVRD_IN_LO, &temp);
@ -589,7 +537,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ }
+
+ /* Fetch clocks */
+ imx6_pcie->lvds_gate = clk_get(&pdev->dev, "lvds_gate");
+ imx6_pcie->lvds_gate = devm_clk_get(&pdev->dev, "lvds_gate");
+ if (IS_ERR(imx6_pcie->lvds_gate)) {
+ dev_err(&pdev->dev,
+ "lvds_gate clock select missing or invalid\n");
@ -597,7 +545,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ goto err;
+ }
+
+ imx6_pcie->sata_ref_100m = clk_get(&pdev->dev, "sata_ref_100m");
+ imx6_pcie->sata_ref_100m = devm_clk_get(&pdev->dev, "sata_ref_100m");
+ if (IS_ERR(imx6_pcie->sata_ref_100m)) {
+ dev_err(&pdev->dev,
+ "sata_ref_100m clock source missing or invalid\n");
@ -605,7 +553,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ goto err;
+ }
+
+ imx6_pcie->pcie_ref_125m = clk_get(&pdev->dev, "pcie_ref_125m");
+ imx6_pcie->pcie_ref_125m = devm_clk_get(&pdev->dev, "pcie_ref_125m");
+ if (IS_ERR(imx6_pcie->pcie_ref_125m)) {
+ dev_err(&pdev->dev,
+ "pcie_ref_125m clock source missing or invalid\n");
@ -613,7 +561,7 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+ goto err;
+ }
+
+ imx6_pcie->pcie_axi = clk_get(&pdev->dev, "pcie_axi");
+ imx6_pcie->pcie_axi = devm_clk_get(&pdev->dev, "pcie_axi");
+ if (IS_ERR(imx6_pcie->pcie_axi)) {
+ dev_err(&pdev->dev,
+ "pcie_axi clock source missing or invalid\n");
@ -657,11 +605,11 @@ Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
+
+/* Freescale PCIe driver does not allow module unload */
+
+static int __init imx6_init(void)
+static int __init imx6_pcie_init(void)
+{
+ return platform_driver_probe(&imx6_pcie_driver, imx6_pcie_probe);
+}
+module_init(imx6_init);
+module_init(imx6_pcie_init);
+
+MODULE_AUTHOR("Sean Cross <xobs@kosagi.com>");
+MODULE_DESCRIPTION("Freescale i.MX6 PCIe host controller driver");

17
target/linux/imx6/patches-3.10/0010-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch → target/linux/imx6/patches-3.10/0012-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch
View file

@ -1,15 +1,30 @@
Subject: [v6,1/3] ARM: imx: Add LVDS general-purpose clocks to i.MX6Q
From: Sean Cross <xobs@kosagi.com>
Subject: [PATCH 1/3] ARM: imx: Add LVDS general-purpose clocks to i.MX6Q
The i.MX6 has two general-purpose LVDS clocks that can be driven
from a variety of sources. This patch adds a mux and a gate for
both of these clocks.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
.../devicetree/bindings/clock/imx6q-clock.txt | 4 ++++
arch/arm/mach-imx/clk-imx6q.c | 20 +++++++++++++++++++-
2 files changed, 23 insertions(+), 1 deletion(-)
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -208,6 +208,10 @@ clocks and IDs.
pll4_post_div 193
pll5_post_div 194
pll5_video_div 195
+ lvds1_sel 204
+ lvds2_sel 205
+ lvds1_gate 206
+ lvds2_gate 207
Examples:
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -205,6 +205,11 @@ static const char *vpu_axi_sels[] = { "a

38
target/linux/imx6/patches-3.10/0013-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch Normal file
View file

@ -0,0 +1,38 @@
From 4f6723e8ff497e35c8f2fb20886fccc533c58cdb Mon Sep 17 00:00:00 2001
From: Sean Cross <xobs@kosagi.com>
Date: Thu, 26 Sep 2013 10:45:35 +0800
Subject: [PATCH] ARM: imx6q: clock and Kconfig update for PCIe support
Update imx6q clock initialization and Kconfig for PCIe support.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/mach-imx/Kconfig | 2 ++
arch/arm/mach-imx/clk-imx6q.c | 4 ++++
2 files changed, 6 insertions(+)
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -806,6 +806,8 @@ config SOC_IMX6Q
select HAVE_IMX_SRC
select HAVE_SMP
select MFD_SYSCON
+ select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
select PINCTRL
select PINCTRL_IMX6Q
select PL310_ERRATA_588369 if CACHE_PL310
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -586,6 +586,10 @@ int __init mx6q_clocks_init(void)
clk_prepare_enable(clk[usbphy2_gate]);
}
+ /* All existing boards with PCIe use LVDS1 */
+ if (IS_ENABLED(CONFIG_PCI_IMX6))
+ clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
+
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);

38
target/linux/imx6/patches-3.10/0014-ARM-dts-imx6qdl-add-pcie-device-node.patch Normal file
View file

@ -0,0 +1,38 @@
From 3a57291fa4ca7f7647d826f5b47082ef306d839f Mon Sep 17 00:00:00 2001
From: Sean Cross <xobs@kosagi.com>
Date: Thu, 26 Sep 2013 10:51:09 +0800
Subject: [PATCH] ARM: dts: imx6qdl: add pcie device node
Add pcie device node for imx6qdl.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/boot/dts/imx6qdl.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -108,6 +108,22 @@
cache-level = <2>;
};
+ pcie: pcie@0x01000000 {
+ compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
+ reg = <0x01ffc000 0x4000>; /* DBI */
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
+ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ interrupts = <0 123 0x04>;
+ clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
+ clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
+ status = "disabled";
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 0x04>;

17
target/linux/imx6/patches-3.10/0015-thermal-add-imx-thermal-driver-support.patch
View file

@ -25,9 +25,6 @@ Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
create mode 100644 Documentation/devicetree/bindings/thermal/imx-thermal.txt
create mode 100644 drivers/thermal/imx_thermal.c
diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.txt b/Documentation/devicetree/bindings/thermal/imx-thermal.txt
new file mode 100644
index 0000000..541c25e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/imx-thermal.txt
@@ -0,0 +1,17 @@
@ -48,8 +45,6 @@ index 0000000..541c25e
+ fsl,tempmon = <&anatop>;
+ fsl,tempmon-data = <&ocotp>;
+};
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index e988c81..69eed55 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -91,6 +91,17 @@ config THERMAL_EMULATION
@ -70,21 +65,16 @@ index e988c81..69eed55 100644
config SPEAR_THERMAL
bool "SPEAr thermal sensor driver"
depends on PLAT_SPEAR
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 67184a2..dff19c6 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o
@@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_THERMAL) += exynos_t
obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o
obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
+obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
new file mode 100644
index 0000000..d16c33c
--- /dev/null
+++ b/drivers/thermal/imx_thermal.c
@@ -0,0 +1,397 @@
@ -485,6 +475,3 @@ index 0000000..d16c33c
+MODULE_DESCRIPTION("Thermal driver for Freescale i.MX SoCs");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:imx-thermal");
--
1.8.4

11
target/linux/imx6/patches-3.10/010-pcie-backport-fixes.patch
View file

@ -1,3 +1,14 @@
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -119,7 +119,7 @@
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
interrupts = <0 123 0x04>;
- clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
+ clocks = <&clks 189>, <&clks 187>, <&clks 198>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled";
};
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -125,3 +125,5 @@ config PCI_IOAPIC

11
target/linux/imx6/patches-3.10/011-pci-tweaks.patch
View file

@ -1,14 +1,3 @@
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -119,7 +119,7 @@
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>;
interrupts = <0 123 0x04>;
- clocks = <&clks 189>, <&clks 187>, <&clks 205>, <&clks 144>;
+ clocks = <&clks 189>, <&clks 187>, <&clks 198>, <&clks 144>;
clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
status = "disabled";
};
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -200,12 +200,6 @@ static int pcie_phy_write(void __iomem *