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@ -0,0 +1,629 @@
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/*
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* Copyright 2017 Gateworks Corporation
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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/* these are used by bootloader for disabling nodes */
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aliases {
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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usb0 = &usbh1;
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usb1 = &usbotg;
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};
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chosen {
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bootargs = "console=ttymxc1,115200";
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led0: user1 {
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label = "user1";
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gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led1: user2 {
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label = "user2";
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gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
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default-state = "off";
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};
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led2: user3 {
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label = "user3";
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gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
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default-state = "off";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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user_pb {
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label = "user_pb";
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gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
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linux,code = <256>;
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};
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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pps {
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compatible = "pps-gpio";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pps>;
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gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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reg_1p0v: regulator-1p0v {
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compatible = "regulator-fixed";
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regulator-name = "1P0V";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_h1_vbus: regulator-usb-h1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator-usb-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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dsa {
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compatible = "marvell,dsa";
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#address-cells = <2>;
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#size-cells = <0>;
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dsa,ethernet = <&fec>;
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dsa,mii-bus = <&mdio>;
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switch@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0 0>; /* MDIO address 0, switch 0 in tree */
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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status = "okay";
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mdio: mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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eeprom1: eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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eeprom2: eeprom@51 {
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compatible = "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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};
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eeprom3: eeprom@52 {
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compatible = "atmel,24c02";
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reg = <0x52>;
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pagesize = <16>;
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};
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eeprom4: eeprom@53 {
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compatible = "atmel,24c02";
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reg = <0x53>;
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pagesize = <16>;
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};
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gsc: gsc@20 {
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compatible = "gw,gsc";
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reg = <0x20>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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/* GSC watchdog */
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watchdog {
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compatible = "gw,gsc_wdt";
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status = "okay";
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};
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/* Linux input events from GSC interrupt events */
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input {
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compatible = "gw,gsc_input";
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interrupt-parent = <&gsc>;
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interrupts = <0 1 2 5 7>;
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interrupt-names = "button", "key-erased", "eeprom-wp", "tamper", "button-held";
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status = "okay";
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};
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};
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gsc_gpio: pca9555@23 {
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compatible = "nxp,pca9555";
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reg = <0x23>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gsc>;
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interrupts = <4>;
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};
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gsc_hwmon: hwmon@29 {
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compatible = "gw,gsc_hwmon";
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reg = <0x29>;
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};
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gsc_rtc: ds1672@68 {
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compatible = "dallas,ds1672";
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reg = <0x68>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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/* LSM9DS1 magnetic sensor */
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lsm9ds1-m@0x1c {
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compatible = "st,lsm9ds1-mag";
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reg = <0x1C>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_imu_mag>;
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gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; /* IRQ */
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rot-matrix = /bits/ 16 <(1) (0) (0)
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(0) (1) (0)
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(0) (0) (1)>;
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poll-interval = <100>;
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min-interval = <13>;
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fs-range = <0>;
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};
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/* LSM9DS1 accelerometer/gyroscope sensor */
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lsm9ds1-ag@0x6a {
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compatible = "st,lsm9ds1-acc-gyr";
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reg = <0x6A>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_imu_acc>;
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gpios = <&gpio4 18 GPIO_ACTIVE_LOW>, /* INT1 */
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<&gpio4 19 GPIO_ACTIVE_LOW>; /* INT2 */
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rot-matrix = /bits/ 16 <(1) (0) (0)
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(0) (1) (0)
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(0) (0) (1)>;
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g-poll-interval = <100>;
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g-min-interval = <2>;
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g-fs-range = <0>;
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x-poll-interval = <100>;
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x-min-interval = <1>;
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x-fs-range = <0>;
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aa-filter-bw = <0>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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touchscreen: egalax_ts@04 {
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compatible = "eeti,egalax_ts";
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reg = <0x04>;
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interrupt-parent = <&gpio1>;
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interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
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wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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};
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};
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&ldb {
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status = "okay";
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lvds-channel@0 {
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fsl,data-mapping = "spwg";
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fsl,data-width = <18>;
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status = "okay";
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display-timings {
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native-mode = <&timing0>;
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timing0: hsd100pxn1 {
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clock-frequency = <65000000>;
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hactive = <1024>;
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vactive = <768>;
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hback-porch = <220>;
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hfront-porch = <40>;
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vback-porch = <21>;
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vfront-porch = <7>;
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hsync-len = <60>;
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vsync-len = <10>;
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};
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pwm2 {
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pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pwm3 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&pwm4 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_pwm4>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart1 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart2 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart3 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
|
|
|
fsl,uart-has-rtscts;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart4 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
|
|
|
fsl,uart-has-rtscts;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&uart5 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbotg {
|
|
|
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
disable-over-current;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbh1 {
|
|
|
|
|
vbus-supply = <®_usb_h1_vbus>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usdhc3 {
|
|
|
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
|
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
|
|
|
|
|
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
|
|
|
|
|
non-removable;
|
|
|
|
|
vmmc-supply = <®_3p3v>;
|
|
|
|
|
keep-power-in-suspend;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&wdog1 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_wdog>;
|
|
|
|
|
fsl,ext-reset-output;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&iomuxc {
|
|
|
|
|
imx6qdl-gw5904 {
|
|
|
|
|
pinctrl_enet: enetgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_gpio_leds: gpioledsgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
|
|
|
|
|
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_imu_acc: gpioimxaccgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 /* INT1 */
|
|
|
|
|
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 /* INT2 */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_imu_mag: gpioimxmaggrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 /* IRQ */
|
|
|
|
|
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* data ready */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pcie: pciegrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pmic: pmicgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pps: ppsgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pwm2: pwm2grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_pwm4: pwm4grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_uart5: uart5grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
|
|
|
|
|
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
|
|
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
|
|
|
|
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
|
|
|
|
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
|
|
|
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_wdog: wdoggrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|