* make the usb gpio configurable * 105-header_xway.patch has a corrupt line count in it
SVN-Revision: 24564
This commit is contained in:
John Crispin
parent
a0e49fa2d1
commit
5e3e1d4a02
2 changed files with 20 additions and 37 deletions
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@ -303,7 +303,7 @@
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+#endif
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--- /dev/null
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+++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h
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@@ -0,0 +1,144 @@
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@@ -0,0 +1,194 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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@ -5693,7 +5693,7 @@
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+}
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--- /dev/null
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+++ b/drivers/usb/dwc_otg/dwc_otg_driver.c
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@@ -0,0 +1,1264 @@
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@@ -0,0 +1,1269 @@
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+/* ==========================================================================
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+ * $File: //dwh/usb_iip/dev/software/otg_ipmate/linux/drivers/dwc_otg_driver.c $
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+ * $Revision: 1.1.1.1 $
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@ -5748,6 +5748,7 @@
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+#include <linux/module.h>
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+#include <linux/moduleparam.h>
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+#include <linux/init.h>
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+#include <linux/gpio.h>
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+
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+#include <linux/device.h>
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+#include <linux/platform_device.h>
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@ -6340,6 +6341,10 @@
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+ struct resource *res;
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+ gusbcfg_data_t usbcfg = {.d32 = 0};
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+
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+ // GPIOs
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+ gpio_request(_dev->dev.platform_data, "USB_POWER");
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+ gpio_direction_output(_dev->dev.platform_data, 1);
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+
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+ dev_dbg(&_dev->dev, "dwc_otg_driver_probe (%p)\n", _dev);
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+
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+ dwc_otg_device = kmalloc(sizeof(dwc_otg_device_t), GFP_KERNEL);
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@ -13240,7 +13245,7 @@
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+#endif /* DWC_DEVICE_ONLY */
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--- /dev/null
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+++ b/drivers/usb/dwc_otg/dwc_otg_ifx.c
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@@ -0,0 +1,176 @@
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@@ -0,0 +1,150 @@
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+/******************************************************************************
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+**
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+** FILE NAME : dwc_otg_ifx.c
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@ -13302,40 +13307,14 @@
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+#define readl lq_r32
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+void dwc_otg_power_on (void)
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+{
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+ // GPIOs
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+ gpio_request(28, "USB_POWER");
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+ gpio_direction_output(28, 1);
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+ /*
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+ writel(readl(IFXMIPS_GPIO_P0_DIR) | (0x4000), IFXMIPS_GPIO_P0_DIR);
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+ writel(readl(IFXMIPS_GPIO_P0_OD) | (0x4000), IFXMIPS_GPIO_P0_OD);
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+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL0) & ~(0x4000), IFXMIPS_GPIO_P0_ALTSEL0);
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+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL1) & ~(0x4000), IFXMIPS_GPIO_P0_ALTSEL1);
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+ writel(readl(IFXMIPS_GPIO_P0_OUT) | (0x4000), IFXMIPS_GPIO_P0_OUT);
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+*/
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+/* writel(readl(IFXMIPS_GPIO_P1_DIR) | (0x1000), IFXMIPS_GPIO_P1_DIR);
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+ writel(readl(IFXMIPS_GPIO_P1_OD) | (0x1000), IFXMIPS_GPIO_P1_OD);
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+ writel(readl(IFXMIPS_GPIO_P1_ALTSEL0) & ~(0x1000), IFXMIPS_GPIO_P1_ALTSEL0);
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+ writel(readl(IFXMIPS_GPIO_P1_ALTSEL1) & ~(0x1000), IFXMIPS_GPIO_P1_ALTSEL1);
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+ writel(readl(IFXMIPS_GPIO_P1_OUT) | (0x1000), IFXMIPS_GPIO_P1_OUT);
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+*/
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+ // clear power
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+ //set_bit (0, DANUBE_PMU_PWDCR);
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+ //set_bit (6, DANUBE_PMU_PWDCR);
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+ writel(readl(DANUBE_PMU_PWDCR) | 0x41, DANUBE_PMU_PWDCR);
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+
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+ // set clock gating
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+ //set_bit (4, (volatile unsigned long *)DANUBE_CGU_IFCCR);
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+ //set_bit (5, (volatile unsigned long *)DANUBE_CGU_IFCCR);
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+ writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
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+
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+ // set power
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+ //clear_bit (0, (volatile unsigned long *)DANUBE_PMU_PWDCR);
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+ writel(readl(DANUBE_PMU_PWDCR) & ~0x1, DANUBE_PMU_PWDCR);
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+ //clear_bit (6, (volatile unsigned long *)DANUBE_PMU_PWDCR);
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+ writel(readl(DANUBE_PMU_PWDCR) & ~0x40, DANUBE_PMU_PWDCR);
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+ //clear_bit (15, (volatile unsigned long *)DANUBE_PMU_PWDCR);
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+ writel(readl(DANUBE_PMU_PWDCR) & ~0x8000, DANUBE_PMU_PWDCR);
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+ //writel(readl(DANUBE_PMU_PWDCR) & ~0x8041, DANUBE_PMU_PWDCR);
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+
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+#if 1//defined (DWC_HOST_ONLY)
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+ // make the hardware be a host controller (default)
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@ -15577,10 +15556,10 @@
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obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
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obj-$(CONFIG_LANTIQ_MACH_EASY4010) += mach-easy4010.o
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obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
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+onj-y += dev-dwc_otg.o
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+obj-y += dev-dwc_otg.o
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/dev-dwc_otg.c
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@@ -0,0 +1,64 @@
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@@ -0,0 +1,68 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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@ -15613,17 +15592,20 @@
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+#include <xway_irq.h>
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+#include <lantiq_platform.h>
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+
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+#define LQ_USB_IOMEM_BASE 0x1e101000
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+#define LQ_USB_IOMEM_SIZE 0x00040000
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+
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+static struct resource resources[] =
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+{
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+ [0] = {
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+ .name = "dwc_otg_membase",
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+ .start = IFX_USB_IOMEM_BASE,
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+ .end = IFX_USB_IOMEM_BASE + IFX_USB_IOMEM_SIZE - 1,
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+ .start = LQ_USB_IOMEM_BASE,
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+ .end = LQ_USB_IOMEM_BASE + LQ_USB_IOMEM_SIZE - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ [1] = {
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+ .name = "dwc_otg_irq",
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+ .start = IFX_USB_IRQ,
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+ .start = LQ_USB_INT,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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@ -15643,6 +15625,7 @@
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+xway_register_dwc(int pin)
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+{
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+ lq_enable_irq(resources[1].start);
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+ platform_dev.dev.platform_data = pin;
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+ return platform_device_register(&platform_dev);
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+}
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--- /dev/null
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@ -15667,7 +15650,7 @@
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+#endif
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--- a/arch/mips/lantiq/xway/mach-arv45xx.c
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+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
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@@ -24,6 +24,7 @@
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@@ -23,6 +23,7 @@
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#include <lantiq_platform.h>
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#include "devices.h"
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@ -15675,7 +15658,7 @@
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#define ARV452_LATCH_SWITCH (1 << 10)
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@@ -133,6 +134,7 @@
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@@ -132,6 +133,7 @@
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lq_register_pci(&lq_pci_data);
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lq_register_wdt();
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arv45xx_register_ethernet();
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@ -15683,7 +15666,7 @@
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}
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MIPS_MACHINE(LANTIQ_MACH_ARV4518,
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@@ -152,6 +154,7 @@
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@@ -151,6 +153,7 @@
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lq_register_pci(&lq_pci_data);
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lq_register_wdt();
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arv45xx_register_ethernet();
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