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made the danube pmu f00 generic

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SVN-Revision: 9759
This commit is contained in:
John Crispin 2007-12-14 21:49:03 +00:00
parent e052bd9a18
commit 54968fdf1d
7 changed files with 85 additions and 31 deletions
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3
target/linux/danube/files/arch/mips/danube/dma-core.c
View file

@ -22,6 +22,7 @@
#include <asm/danube/danube.h>
#include <asm/danube/danube_irq.h>
#include <asm/danube/danube_dma.h>
#include <asm/danube/danube_pmu.h>
/*25 descriptors for each dma channel,4096/8/20=25.xx*/
#define DANUBE_DMA_DESCRIPTOR_OFFSET 25
@ -684,7 +685,7 @@ dma_chip_init(void)
int i;
// enable DMA from PMU
writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_DMA, DANUBE_PMU_PWDCR);
danube_pmu_enable(DANUBE_PMU_PWDCR_DMA);
// reset DMA
writel(readl(DANUBE_DMA_CTRL) | 1, DANUBE_DMA_CTRL);

45
target/linux/danube/files/arch/mips/danube/pmu.c Normal file
View file

@ -0,0 +1,45 @@
/*
* arch/mips/danube/pmu.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <asm/danube/danube.h>
void
danube_pmu_enable (unsigned int module)
{
int err = 1000000;
writel(readl(DANUBE_PMU_PWDCR) & ~module, DANUBE_PMU_PWDCR);
while (--err && (readl(DANUBE_PMU_PWDSR) & module)) {}
if (!err)
panic("activating PMU module failed!");
}
EXPORT_SYMBOL(danube_pmu_enable);
void
danube_pmu_disable (unsigned int module)
{
writel(readl(DANUBE_PMU_PWDCR) | module, DANUBE_PMU_PWDCR);
}
EXPORT_SYMBOL(danube_pmu_disable);

3
target/linux/danube/files/arch/mips/danube/setup.c
View file

@ -32,6 +32,7 @@
#include <asm/irq.h>
#include <asm/danube/danube.h>
#include <asm/danube/danube_irq.h>
#include <asm/danube/danube_pmu.h>
static unsigned int r4k_offset; /* Amount to increment compare reg each time */
static unsigned int r4k_cur; /* What counter should be at next timer irq */
@ -138,7 +139,7 @@ plat_timer_setup (struct irqaction *irq)
r4k_cur = (read_c0_count() + r4k_offset);
write_c0_compare(r4k_cur);
writel(readl(DANUBE_PMU_PWDCR) & ~(DANUBE_PMU_PWDCR_GPT|DANUBE_PMU_PWDCR_FPI), DANUBE_PMU_PWDCR);
danube_pmu_enable(DANUBE_PMU_PWDCR_GPT | DANUBE_PMU_PWDCR_FPI);
writel(0x100, DANUBE_GPTU_GPT_CLC);

22
target/linux/danube/files/drivers/char/danube_led.c
View file

@ -29,7 +29,7 @@
#include <linux/errno.h>
#include <asm/danube/danube.h>
#include <asm/danube/danube_gpio.h>
#include <asm/delay.h>
#include <asm/danube/danube_pmu.h>
#define DANUBE_LED_CLK_EDGE DANUBE_LED_FALLING
//#define DANUBE_LED_CLK_EDGE DANUBE_LED_RISING
@ -87,24 +87,6 @@ danube_led_setup_gpio (void)
}
}
static void
danube_led_enable (void)
{
int err = 1000000;
writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
while (--err && (readl(DANUBE_PMU_PWDSR) & DANUBE_PMU_PWDCR_LED)) {}
if (!err)
panic("Activating LED in PMU failed!");
}
static inline void
danube_led_disable (void)
{
writel(readl(DANUBE_PMU_PWDCR) | DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
}
static int
led_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
@ -187,7 +169,7 @@ danube_led_init (void)
writel(readl(DANUBE_LED_CON0) | DANUBE_LED_ADSL_SRC, DANUBE_LED_CON0);
/* per default, the leds are turned on */
danube_led_enable();
danube_pmu_enable(DANUBE_PMU_PWDCR_LED);
danube_led_major = register_chrdev(0, "danube_led", &danube_led_fops);

6
target/linux/danube/files/drivers/net/danube_mii0.c
View file

@ -44,6 +44,7 @@
#include <asm/danube/danube.h>
#include <asm/danube/danube_mii0.h>
#include <asm/danube/danube_dma.h>
#include <asm/danube/danube_pmu.h>
static struct net_device danube_mii0_dev;
static unsigned char u_boot_ethaddr[MAX_ADDR_LEN];
@ -372,9 +373,8 @@ switch_init (struct net_device *dev)
static void
danube_sw_chip_init (int mode)
{
writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_DMA, DANUBE_PMU_PWDCR);
writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_PPE, DANUBE_PMU_PWDCR);
wmb();
danube_pmu_enable(DANUBE_PMU_PWDCR_DMA);
danube_pmu_enable(DANUBE_PMU_PWDCR_PPE);
if(mode == REV_MII_MODE)
writel((readl(DANUBE_PPE32_CFG) & PPE32_MII_MASK) | PPE32_MII_REVERSE, DANUBE_PPE32_CFG);

6
target/linux/danube/files/include/asm-mips/danube/danube.h
View file

@ -163,12 +163,6 @@
#define DANUBE_PMU_PWDCR ((u32*)(DANUBE_PMU_BASE_ADDR + 0x001C))
#define DANUBE_PMU_PWDSR ((u32*)(DANUBE_PMU_BASE_ADDR + 0x0020))
#define DANUBE_PMU_PWDCR_DMA 0x20
#define DANUBE_PMU_PWDCR_LED 0x800
#define DANUBE_PMU_PWDCR_GPT 0x1000
#define DANUBE_PMU_PWDCR_PPE 0x2000
#define DANUBE_PMU_PWDCR_FPI 0x4000
/*------------ ICU */

31
target/linux/danube/files/include/asm-mips/danube/danube_pmu.h Normal file
View file

@ -0,0 +1,31 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
*
* Copyright (C) 2007 John Crispin <blogic@openwrt.org>
*
*/
#ifndef _DANUBE_PMU_H__
#define _DANUBE_PMU_H__
#define DANUBE_PMU_PWDCR_DMA 0x20
#define DANUBE_PMU_PWDCR_LED 0x800
#define DANUBE_PMU_PWDCR_GPT 0x1000
#define DANUBE_PMU_PWDCR_PPE 0x2000
#define DANUBE_PMU_PWDCR_FPI 0x4000
void danube_pmu_enable (unsigned int module);
void danube_pmu_disable (unsigned int module);
#endif