upgrade to 2.6.37.4

SVN-Revision: 26227

target/linux/octeon/Makefile

@@ -1,5 +1,5 @@
 #
-# Copyright (C) 2009 OpenWrt.org
+# Copyright (C) 2009-2011 OpenWrt.org
 #
 # This is free software, licensed under the GNU General Public License v2.
 # See /LICENSE for more information.
@@ -10,9 +10,9 @@ ARCH:=mips
 BOARD:=octeon
 BOARDNAME:=Cavium Networks Octeon
 FEATURES:=squashfs jffs2 pci usb
-CFLAGS:=-Os -pipe -mtune=octeon -funit-at-a-time
+CFLAGS:=-Os -pipe -march=octeon -funit-at-a-time
 
-LINUX_VERSION:=2.6.30.10
+LINUX_VERSION:=2.6.37.4
 
 include $(INCLUDE_DIR)/target.mk
 

target/linux/octeon/config-default

@@ -23,6 +23,7 @@ CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
 CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_CAVIUM_CN63XXP1 is not set
 # CONFIG_CAVIUM_OCTEON_2ND_KERNEL is not set
 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
 CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNED=y
@@ -175,6 +176,7 @@ CONFIG_NR_CPUS_DEFAULT_16=y
 # CONFIG_NXP_STB225 is not set
 CONFIG_OCTEON_ETHERNET=y
 CONFIG_OCTEON_MGMT_ETHERNET=y
+CONFIG_OCTEON_WDT=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 # CONFIG_PARTITION_ADVANCED is not set
 CONFIG_PCI=y

target/linux/octeon/patches-2.6.34/002-nb5_fixup.patch

@@ -1,21 +0,0 @@
---- a/arch/mips/pci/pci-octeon.c
-+++ b/arch/mips/pci/pci-octeon.c
-@@ -217,6 +217,8 @@ const char *octeon_get_pci_interrupts(vo
- 		return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
- 	case CVMX_BOARD_TYPE_BBGW_REF:
- 		return "AABCD";
-+	case CVMX_BOARD_TYPE_CUST_NB5:
-+		return "ABDABAAAAAAAAAAAAAAAAAAAAAAAAAAA";
- 	case CVMX_BOARD_TYPE_THUNDER:
- 	case CVMX_BOARD_TYPE_EBH3000:
- 	default:
---- a/drivers/staging/octeon/cvmx-helper-board.c
-+++ b/drivers/staging/octeon/cvmx-helper-board.c
-@@ -707,6 +707,7 @@ cvmx_helper_board_usb_clock_types_t __cv
- {
- 	switch (cvmx_sysinfo_get()->board_type) {
- 	case CVMX_BOARD_TYPE_BBGW_REF:
-+	case CVMX_BOARD_TYPE_CUST_NB5:
- 		return USB_CLOCK_TYPE_CRYSTAL_12;
- 	}
- 	return USB_CLOCK_TYPE_REF_48;

target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch

@@ -1,40 +0,0 @@
-When building with a toolchain that is configured to produce 32-bits executable
-by default, we will produce __lshrti3 in sched_clock() which is never resolved
-so the kernel fails to link. Unconditionally use the inline assemble version
-as suggested by David Daney, which works around the issue.
-
-CC: David Daney <ddaney@caviumnetworks.com>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/cavium-octeon/csrc-octeon.c |    8 --------
- 1 files changed, 0 insertions(+), 8 deletions(-)
-
-diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
-index 0bf4bbe..36400d2 100644
---- a/arch/mips/cavium-octeon/csrc-octeon.c
-+++ b/arch/mips/cavium-octeon/csrc-octeon.c
-@@ -53,7 +53,6 @@ static struct clocksource clocksource_mips = {
- unsigned long long notrace sched_clock(void)
- {
- 	/* 64-bit arithmatic can overflow, so use 128-bit.  */
--#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
- 	u64 t1, t2, t3;
- 	unsigned long long rv;
- 	u64 mult = clocksource_mips.mult;
-@@ -73,13 +72,6 @@ unsigned long long notrace sched_clock(void)
- 		: [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
- 		: "hi", "lo");
- 	return rv;
--#else
--	/* GCC > 4.3 do it the easy way.  */
--	unsigned int __attribute__((mode(TI))) t;
--	t = read_c0_cvmcount();
--	t = t * clocksource_mips.mult;
--	return (unsigned long long)(t >> clocksource_mips.shift);
--#endif
- }
- 
- void __init plat_time_init(void)
--- 
-1.7.1
-

target/linux/octeon/patches/001-wndap330_hacks.patch

@@ -62,7 +62,7 @@
  				     __func__);
 --- a/arch/mips/pci/pci-octeon.c
 +++ b/arch/mips/pci/pci-octeon.c
-@@ -210,9 +210,11 @@ const char *octeon_get_pci_interrupts(vo
+@@ -217,9 +217,11 @@ const char *octeon_get_pci_interrupts(vo
  		/* This is really the NAC38 */
  		return "AAAAADABAAAAAAAAAAAAAAAAAAAAAAAA";
  	case CVMX_BOARD_TYPE_EBH3100:

target/linux/octeon/patches/002-nb5_fixup.patch

@@ -0,0 +1,11 @@
+--- a/arch/mips/pci/pci-octeon.c
++++ b/arch/mips/pci/pci-octeon.c
+@@ -224,6 +224,8 @@ const char *octeon_get_pci_interrupts(vo
+ 		return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
+ 	case CVMX_BOARD_TYPE_BBGW_REF:
+ 		return "AABCD";
++	case CVMX_BOARD_TYPE_CUST_NB5:
++		return "ABDABAAAAAAAAAAAAAAAAAAAAAAAAAAA";
+ 	case CVMX_BOARD_TYPE_THUNDER:
+ 	case CVMX_BOARD_TYPE_EBH3000:
+ 	default: