ar71xx: use backported GPIO patches
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35875
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4 changed files with 84 additions and 8 deletions
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@ -1,10 +1,12 @@
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From 177dc53a07e2c660d1c1a6cec4576c802325e330 Mon Sep 17 00:00:00 2001
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From 2e6a41e0be6a09ed839e3afbe1fb413a015d8870 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 14 Nov 2012 09:02:01 +0100
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Date: Tue, 29 Jan 2013 08:19:12 +0000
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Subject: [PATCH] MIPS: ath79: fix GPIO function selection for AR934x SoCs
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commit 8838becdf5f7261d7f5dfbbe957fe9b9ed188aec upstream.
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GPIO function selection is not working on the AR934x
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SoCs because the offset of the function selection
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SoCs because the offset of the function selection
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register is different on those.
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Add a helper routine which returns the correct
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@ -12,6 +14,8 @@ register address based on the SoC type, and use
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that in the 'ath79_gpio_function_*' routines.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4870/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/gpio.c | 38 ++++++++++++++++--------
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 ++
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@ -95,7 +99,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -521,6 +521,8 @@
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@@ -401,6 +401,8 @@
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#define AR71XX_GPIO_REG_INT_ENABLE 0x24
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#define AR71XX_GPIO_REG_FUNC 0x28
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@ -0,0 +1,72 @@
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From 6c888a88f2a9939182bf41151f079a6b59f1593c Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Tue, 29 Jan 2013 08:19:13 +0000
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Subject: [PATCH] MIPS: ath79: simplify ath79_gpio_function_* routines
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commit f160a289e0e8848391f5ec48ff1a014b9c04b162 upstream.
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Make ath79_gpio_function_{en,dis}able to be wrappers
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around ath79_gpio_function_setup.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Patchwork: http://patchwork.linux-mips.org/patch/4871/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ath79/gpio.c | 30 ++++++------------------------
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1 file changed, 6 insertions(+), 24 deletions(-)
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -154,46 +154,28 @@ static void __iomem *ath79_gpio_get_func
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return ath79_gpio_base + reg;
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}
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-void ath79_gpio_function_enable(u32 mask)
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+void ath79_gpio_function_setup(u32 set, u32 clear)
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{
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void __iomem *reg = ath79_gpio_get_function_reg();
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unsigned long flags;
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spin_lock_irqsave(&ath79_gpio_lock, flags);
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- __raw_writel(__raw_readl(reg) | mask, reg);
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+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
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/* flush write */
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__raw_readl(reg);
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spin_unlock_irqrestore(&ath79_gpio_lock, flags);
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}
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-void ath79_gpio_function_disable(u32 mask)
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+void ath79_gpio_function_enable(u32 mask)
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{
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- void __iomem *reg = ath79_gpio_get_function_reg();
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- unsigned long flags;
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-
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- spin_lock_irqsave(&ath79_gpio_lock, flags);
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-
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- __raw_writel(__raw_readl(reg) & ~mask, reg);
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- /* flush write */
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- __raw_readl(reg);
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-
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- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
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+ ath79_gpio_function_setup(mask, 0);
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}
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-void ath79_gpio_function_setup(u32 set, u32 clear)
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+void ath79_gpio_function_disable(u32 mask)
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{
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- void __iomem *reg = ath79_gpio_get_function_reg();
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- unsigned long flags;
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-
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- spin_lock_irqsave(&ath79_gpio_lock, flags);
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-
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- __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
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- /* flush write */
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- __raw_readl(reg);
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-
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- spin_unlock_irqrestore(&ath79_gpio_lock, flags);
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+ ath79_gpio_function_setup(0, mask);
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}
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void __init ath79_gpio_init(void)
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@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -198,12 +198,14 @@ void __init ath79_gpio_init(void)
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@@ -194,12 +194,14 @@ void __init ath79_gpio_init(void)
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ath79_gpio_count = AR933X_GPIO_COUNT;
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else if (soc_is_ar934x())
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ath79_gpio_count = AR934X_GPIO_COUNT;
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@ -29,7 +29,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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}
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -507,6 +507,7 @@
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@@ -509,6 +509,7 @@
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#define AR913X_GPIO_COUNT 22
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#define AR933X_GPIO_COUNT 30
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#define AR934X_GPIO_COUNT 23
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@ -10,8 +10,8 @@
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#endif /* __ATH79_COMMON_H */
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -198,6 +198,34 @@ void ath79_gpio_function_setup(u32 set,
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spin_unlock_irqrestore(&ath79_gpio_lock, flags);
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@@ -180,6 +180,34 @@ void ath79_gpio_function_disable(u32 mas
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ath79_gpio_function_setup(0, mask);
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}
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+void __init ath79_gpio_output_select(unsigned gpio, u8 val)
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