ipq806x: disable usb3 phy suspend and add usb tcsr control

According to Qualcomm SDK usb3 phy suspend should be disabled for
ipq806x.
This may solve issue on some ipq806x devices that breaks usb3
storage peripherals during system boot.

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This commit is contained in:
Pavel Kubelun 2016-12-24 01:51:07 +03:00 committed by John Crispin
parent c067011af8
commit 45bf3d4f24
3 changed files with 43 additions and 1 deletions

View file

@ -863,6 +863,8 @@
clocks = <&gcc USB30_0_MASTER_CLK>;
clock-names = "core";
syscon-tcsr = <&tcsr 0xb0 1>;
ranges;
status = "disabled";
@ -876,6 +878,7 @@
phys = <&hs_phy_0>, <&ss_phy_0>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
snps,dis_u3_susphy_quirk;
};
};
@ -886,6 +889,8 @@
clocks = <&gcc USB30_1_MASTER_CLK>;
clock-names = "core";
syscon-tcsr = <&tcsr 0xb0 0>;
ranges;
status = "disabled";
@ -897,6 +902,7 @@
phys = <&hs_phy_1>, <&ss_phy_1>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
snps,dis_u3_susphy_quirk;
};
};

View file

@ -0,0 +1,36 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -678,6 +678,8 @@
clocks = <&gcc USB30_0_MASTER_CLK>;
clock-names = "core";
+ syscon-tcsr = <&tcsr 0xb0 1>;
+
ranges;
status = "disabled";
@@ -689,6 +691,7 @@
phys = <&hs_phy_0>, <&ss_phy_0>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
+ snps,dis_u3_susphy_quirk;
};
};
@@ -699,6 +702,8 @@
clocks = <&gcc USB30_1_MASTER_CLK>;
clock-names = "core";
+ syscon-tcsr = <&tcsr 0xb0 0>;
+
ranges;
status = "disabled";
@@ -710,6 +715,7 @@
phys = <&hs_phy_1>, <&ss_phy_1>;
phy-names = "usb2-phy", "usb3-phy";
dr_mode = "host";
+ snps,dis_u3_susphy_quirk;
};
};

View file

@ -121,7 +121,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
};
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -904,6 +904,92 @@
@@ -910,6 +910,92 @@
status = "disabled";
};