ar71xx: fix AR934X_EHCI_SIZE

SVN-Revision: 32947
This commit is contained in:
Gabor Juhos 2012-08-02 11:25:46 +00:00
parent b873051706
commit 3e1e52a524
4 changed files with 4 additions and 4 deletions

View file

@ -60,7 +60,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
#define AR934X_WMAC_SIZE 0x20000
+#define AR934X_EHCI_BASE 0x1b000000
+#define AR934X_EHCI_SIZE 0x1000
+#define AR934X_EHCI_SIZE 0x200
/*
* DDR_CTRL block

View file

@ -82,7 +82,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -92,6 +92,10 @@
#define AR934X_EHCI_BASE 0x1b000000
#define AR934X_EHCI_SIZE 0x1000
#define AR934X_EHCI_SIZE 0x200
+#define QCA955X_EHCI0_BASE 0x1b000000
+#define QCA955X_EHCI1_BASE 0x1b400000

View file

@ -61,7 +61,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -92,6 +92,8 @@
#define AR934X_EHCI_BASE 0x1b000000
#define AR934X_EHCI_SIZE 0x1000
#define AR934X_EHCI_SIZE 0x200
+#define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
+#define QCA955X_WMAC_SIZE 0x20000

View file

@ -83,7 +83,7 @@ Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -92,6 +92,19 @@
#define AR934X_EHCI_BASE 0x1b000000
#define AR934X_EHCI_SIZE 0x1000
#define AR934X_EHCI_SIZE 0x200
+#define QCA955X_PCI_MEM_BASE0 0x10000000
+#define QCA955X_PCI_MEM_BASE1 0x12000000