ramips: fix mt7620 pinmux for second SPI
The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part of the "spi refclk" group. The function "spi refclk" enables the second chip select. On reset, the pins of the "spi refclk" group are used as reference clock and GPIO. Signed-off-by: Mathias Kresin <dev@kresin.me>
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a2488f3a24
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3601c3de23
2 changed files with 4 additions and 4 deletions
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@ -343,8 +343,8 @@
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spi_cs1: spi1 {
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spi_cs1: spi1 {
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spi1 {
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spi1 {
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ralink,group = "spi_cs1";
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ralink,group = "spi refclk";
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ralink,function = "spi_cs1";
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ralink,function = "spi refclk";
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};
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};
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};
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};
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@ -264,8 +264,8 @@
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spi_cs1: spi1 {
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spi_cs1: spi1 {
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spi1 {
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spi1 {
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ralink,group = "spi_cs1";
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ralink,group = "spi refclk";
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ralink,function = "spi_cs1";
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ralink,function = "spi refclk";
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};
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};
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};
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};
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