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ramips: fix mt7620 pinmux for second SPI

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The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the "spi refclk" group. The function "spi refclk" enables the second
chip select.

On reset, the pins of the "spi refclk" group are used as reference
clock and GPIO.

Signed-off-by: Mathias Kresin <dev@kresin.me>
This commit is contained in:
Mathias Kresin 2018-08-22 07:30:36 +02:00
parent a2488f3a24
commit 3601c3de23
2 changed files with 4 additions and 4 deletions
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4
target/linux/ramips/dts/mt7620a.dtsi
View file

@ -343,8 +343,8 @@
spi_cs1: spi1 {
spi1 {
ralink,group = "spi_cs1";
ralink,function = "spi_cs1";
ralink,group = "spi refclk";
ralink,function = "spi refclk";
};
};

4
target/linux/ramips/dts/mt7620n.dtsi
View file

@ -264,8 +264,8 @@
spi_cs1: spi1 {
spi1 {
ralink,group = "spi_cs1";
ralink,function = "spi_cs1";
ralink,group = "spi refclk";
ralink,function = "spi refclk";
};
};