ipq8064: pinctrl: Fixed missing RGMII pincontrol definitions
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
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1 changed files with 54 additions and 0 deletions
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From a3488aa9bed37c56e405967d44e821c484b5d6b9 Mon Sep 17 00:00:00 2001
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From: Ram Chandra Jangir <rjangir@codeaurora.org>
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Date: Fri, 28 Sep 2018 15:19:50 +0530
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Subject: [PATCH] ipq8064: pinctrl: Fixed missing RGMII pincontrol definitions
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Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
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---
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drivers/pinctrl/qcom/pinctrl-ipq8064.c | 10 +++++-----
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1 file changed, 5 insertions(+), 5 deletions(-)
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diff --git a/drivers/pinctrl/qcom/pinctrl-ipq8064.c b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
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index bcb29c0..30b7809 100644
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--- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c
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+++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c
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@@ -308,7 +308,7 @@ enum ipq8064_functions {
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};
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static const char * const mdio_groups[] = {
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- "gpio0", "gpio1", "gpio10", "gpio11",
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+ "gpio0", "gpio1", "gpio2", "gpio10", "gpio11", "gpio66",
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};
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static const char * const mi2s_groups[] = {
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@@ -412,8 +412,8 @@ enum ipq8064_functions {
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};
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static const char * const rgmii2_groups[] = {
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- "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
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- "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62",
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+ "gpio2", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
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+ "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62", "gpio66",
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};
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static const char * const sata_groups[] = {
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@@ -548,7 +548,7 @@ enum ipq8064_functions {
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static const struct msm_pingroup ipq8064_groups[] = {
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PINGROUP(0, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(1, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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- PINGROUP(2, gsbi5_spi_cs3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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+ PINGROUP(2, gsbi5_spi_cs3, rgmii2, mdio, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(3, pcie1_rst, pcie1_prsnt, pdm, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(4, pcie1_pwren_n, pcie1_pwren, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(5, pcie1_clk_req, pcie1_pwrflt, NA, NA, NA, NA, NA, NA, NA, NA),
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@@ -612,7 +612,7 @@ enum ipq8064_functions {
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PINGROUP(63, pcie3_rst, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(65, pcie3_clk_req, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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- PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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+ PINGROUP(66, rgmii2, mdio, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(67, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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PINGROUP(68, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
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SDC_PINGROUP(sdc3_clk, 0x204a, 14, 6),
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--
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1.9.1
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