ar71xx: fixup onboard PCIe chip registration on the DB120 board
SVN-Revision: 29022
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parent
f623066e60
commit
15d7016c9f
3 changed files with 36 additions and 6 deletions
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@ -2,6 +2,7 @@
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* Atheros db120 reference board PCI initialization
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*
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* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* Parts of this file are based on Atheros linux 2.6.31 BSP
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*
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@ -11,12 +12,18 @@
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*/
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#include <linux/pci.h>
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#include <linux/ath9k_platform.h>
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#include <asm/mach-ar71xx/ar71xx.h>
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#include <asm/mach-ar71xx/pci.h>
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#include "dev-db120-pci.h"
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static struct ath9k_platform_data db120_wmac_data = {
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.led_pin = -1,
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};
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static char db120_wmac_mac[6];
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static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = {
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{
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.slot = 0,
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@ -25,7 +32,28 @@ static struct ar71xx_pci_irq db120_pci_irqs[] __initdata = {
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}
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};
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void __init db120_pci_init(void)
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static int db120_pci_plat_dev_init(struct pci_dev *dev)
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{
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switch (PCI_SLOT(dev->devfn)) {
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case 0:
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dev->dev.platform_data = &db120_wmac_data;
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break;
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}
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return 0;
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}
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void __init db120_pci_init(u8 *cal_data, u8 *mac_addr)
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{
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if (cal_data)
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memcpy(db120_wmac_data.eeprom_data, cal_data,
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sizeof(db120_wmac_data.eeprom_data));
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if (mac_addr) {
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memcpy(db120_wmac_mac, mac_addr, sizeof(db120_wmac_mac));
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db120_wmac_data.macaddr = db120_wmac_mac;
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}
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ar71xx_pci_plat_dev_init = db120_pci_plat_dev_init;
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ar71xx_pci_init(ARRAY_SIZE(db120_pci_irqs), db120_pci_irqs);
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}
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@ -2,6 +2,7 @@
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* Atheros DB120 reference board PCI initialization
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*
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* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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*
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* Parts of this file are based on Atheros linux 2.6.31 BSP
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*
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@ -14,9 +15,9 @@
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#define _AR71XX_DEV_DB120_PCI_H
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#if defined(CONFIG_AR71XX_DEV_DB120_PCI)
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void db120_pci_init(void);
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void db120_pci_init(u8 *cal_data, u8 *mac_addr);
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#else
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static inline void db120_pci_init(void) { }
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static inline void db120_pci_init(u8 *cal_data, u8 *mac_addr) { }
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#endif
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#endif /* _AR71XX_DEV_DB120_PCI_H */
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@ -32,7 +32,8 @@
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#define DB120_MAC0_OFFSET 0
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#define DB120_MAC1_OFFSET 6
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#define DB120_CALDATA_OFFSET 0x1000
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#define DB120_WMAC_CALDATA_OFFSET 0x1000
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#define DB120_PCIE_CALDATA_OFFSET 0x5000
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#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
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@ -145,9 +146,9 @@ static void __init db120_setup(void)
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ar71xx_add_device_eth(1);
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ar9xxx_add_device_wmac(art + DB120_CALDATA_OFFSET, NULL);
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ar9xxx_add_device_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL);
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db120_pci_init();
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db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL);
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}
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MIPS_MACHINE(AR71XX_MACH_DB120, "DB120", "Atheros DB120", db120_setup);
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