ramips: fix pcie irq mapping for mt7621 on v4.9
Signed-off-by: John Crispin <john@phrozen.org>
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2ebfdabfbd
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0f4600c275
1 changed files with 18 additions and 10 deletions
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@ -10,8 +10,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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2 files changed, 814 insertions(+)
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create mode 100644 arch/mips/pci/pci-mt7621.c
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--- a/arch/mips/pci/Makefile
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+++ b/arch/mips/pci/Makefile
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Index: linux-4.9.14/arch/mips/pci/Makefile
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===================================================================
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--- linux-4.9.14.orig/arch/mips/pci/Makefile
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+++ linux-4.9.14/arch/mips/pci/Makefile
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@@ -46,6 +46,7 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops
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obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
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obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
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@ -20,9 +22,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o
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obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
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obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
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Index: linux-4.9.14/arch/mips/pci/pci-mt7621.c
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===================================================================
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--- /dev/null
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+++ b/arch/mips/pci/pci-mt7621.c
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@@ -0,0 +1,832 @@
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+++ linux-4.9.14/arch/mips/pci/pci-mt7621.c
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@@ -0,0 +1,836 @@
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+/**************************************************************************
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+ *
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+ * BRIEF MODULE DESCRIPTION
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@ -77,6 +81,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+#include <linux/delay.h>
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+#include <linux/of.h>
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+#include <linux/of_pci.h>
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+#include <linux/of_irq.h>
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+#include <linux/platform_device.h>
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+
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+#include <ralink_regs.h>
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@ -98,12 +103,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+
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+#define RALINK_PCI_CONFIG_ADDR 0x20
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+#define RALINK_PCI_CONFIG_DATA_VIRTUAL_REG 0x24
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+#define SURFBOARDINT_PCIE0 11 /* PCIE0 */
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+#define RALINK_INT_PCIE0 SURFBOARDINT_PCIE0
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+#define RALINK_INT_PCIE1 SURFBOARDINT_PCIE1
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+#define RALINK_INT_PCIE2 SURFBOARDINT_PCIE2
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+#define SURFBOARDINT_PCIE1 31 /* PCIE1 */
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+#define SURFBOARDINT_PCIE2 32 /* PCIE2 */
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+#define RALINK_INT_PCIE0 pcie_irq[0]
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+#define RALINK_INT_PCIE1 pcie_irq[1]
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+#define RALINK_INT_PCIE2 pcie_irq[2]
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+#define RALINK_PCI_MEMBASE *(volatile u32 *)(RALINK_PCI_BASE + 0x0028)
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+#define RALINK_PCI_IOBASE *(volatile u32 *)(RALINK_PCI_BASE + 0x002C)
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+#define RALINK_PCIE0_RST (1<<24)
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@ -221,6 +223,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+#define PCI_ACCESS_WRITE_2 4
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+#define PCI_ACCESS_WRITE_4 5
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+
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+static int pcie_irq[3];
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+
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+static int config_access(unsigned char access_type, struct pci_bus *bus,
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+ unsigned int devfn, unsigned int where, u32 * data)
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+{
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@ -599,6 +603,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+static int mt7621_pci_probe(struct platform_device *pdev)
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+{
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+ unsigned long val = 0;
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+ int i;
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+
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+ for (i = 0; i < 3; i++)
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+ pcie_irq[i] = irq_of_parse_and_map(pdev->dev.of_node, i);
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+
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+ iomem_resource.start = 0;
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+ iomem_resource.end= ~0;
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