ar71xx: add kernel support for the EnGenius ESR900
Signed-off-by: Forest Crossman <cyrozap@gmail.com> Patchwork: http://patchwork.openwrt.org/patch/5714/ [juhosg: - drop nvram.c modifications, - create a separate kernel patch, - use ath79_setup_qca955x_eth_cfg helper, - merge esr900_{010,common}_setup functions, - statically init AR8327 pad configurations, - use pr_err instead of printk] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 41640
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Gabor Juhos
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3 changed files with 240 additions and 0 deletions
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@ -50,6 +50,7 @@ CONFIG_ATH79_MACH_EAP7660D=y
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CONFIG_ATH79_MACH_EL_M150=y
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CONFIG_ATH79_MACH_EL_M150=y
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CONFIG_ATH79_MACH_EL_MINI=y
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CONFIG_ATH79_MACH_EL_MINI=y
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CONFIG_ATH79_MACH_ESR1750=y
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CONFIG_ATH79_MACH_ESR1750=y
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CONFIG_ATH79_MACH_ESR900=y
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CONFIG_ATH79_MACH_EW_DORIN=y
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CONFIG_ATH79_MACH_EW_DORIN=y
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CONFIG_ATH79_MACH_GL_INET=y
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CONFIG_ATH79_MACH_GL_INET=y
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CONFIG_ATH79_MACH_GS_OOLITE=y
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CONFIG_ATH79_MACH_GS_OOLITE=y
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target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c
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target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c
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@ -0,0 +1,200 @@
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/*
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* EnGenius ESR900 board support
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*
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* Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) "esr900: " fmt
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#include <linux/platform_device.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "pci.h"
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#include "dev-ap9x-pci.h"
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#include "dev-gpio-buttons.h"
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#include "dev-eth.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "nvram.h"
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#define ESR900_GPIO_LED_POWER 2
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#define ESR900_GPIO_LED_WLAN_2G 13
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#define ESR900_GPIO_LED_WPS_BLUE 19
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#define ESR900_GPIO_LED_WPS_AMBER 22
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#define ESR900_GPIO_LED_WLAN_5G 23
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#define ESR900_GPIO_BTN_WPS 16
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#define ESR900_GPIO_BTN_RESET 17
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#define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */
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#define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL)
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#define ESR900_CALDATA_ADDR 0x1fff0000
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#define ESR900_WMAC_CALDATA_OFFSET 0x1000
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#define ESR900_PCIE_CALDATA_OFFSET 0x5000
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#define ESR900_CONFIG_ADDR 0x1f030000
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#define ESR900_CONFIG_SIZE 0x10000
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#define ESR900_LAN_PHYMASK BIT(0)
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#define ESR900_WAN_PHYMASK BIT(5)
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#define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK))
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static struct gpio_led esr900_leds_gpio[] __initdata = {
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{
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.name = "engenius:amber:power",
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.gpio = ESR900_GPIO_LED_POWER,
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.active_low = 1,
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},
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{
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.name = "engenius:blue:wlan-2g",
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.gpio = ESR900_GPIO_LED_WLAN_2G,
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.active_low = 1,
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},
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{
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.name = "engenius:blue:wps",
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.gpio = ESR900_GPIO_LED_WPS_BLUE,
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.active_low = 1,
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},
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{
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.name = "engenius:amber:wps",
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.gpio = ESR900_GPIO_LED_WPS_AMBER,
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.active_low = 1,
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},
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{
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.name = "engenius:blue:wlan-5g",
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.gpio = ESR900_GPIO_LED_WLAN_5G,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button esr900_gpio_keys[] __initdata = {
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{
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.desc = "WPS button",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
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.gpio = ESR900_GPIO_BTN_WPS,
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.active_low = 1,
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},
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL,
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.gpio = ESR900_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = {
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/* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = {
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/* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */
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.mode = AR8327_PAD_MAC_SGMII,
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.rxclk_delay_en = true,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
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};
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static struct ar8327_platform_data esr900_ar8327_data = {
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.pad0_cfg = &esr900_ar8327_pad0_cfg,
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.pad6_cfg = &esr900_ar8327_pad6_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.port6_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info esr900_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &esr900_ar8327_data,
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},
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};
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static void __init esr900_setup(void)
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{
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const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR);
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u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR);
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u8 lan_mac[6];
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u8 wlan0_mac[6];
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u8 wlan1_mac[6];
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if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE,
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"ethaddr=", lan_mac) == 0) {
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ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac);
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ath79_init_mac(wlan0_mac, lan_mac, 0);
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ath79_init_mac(wlan1_mac, lan_mac, 1);
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} else {
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pr_err("could not find ethaddr in u-boot environment\n");
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}
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio),
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esr900_leds_gpio);
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ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(esr900_gpio_keys),
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esr900_gpio_keys);
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ath79_register_usb();
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ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac);
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ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
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ath79_register_mdio(0, 0x0);
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mdiobus_register_board_info(esr900_mdio0_info,
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ARRAY_SIZE(esr900_mdio0_info));
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/* GMAC0 is connected to the RMGII interface */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK;
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0xa6000000;
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ath79_register_eth(0);
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/* GMAC1 is connected to the SGMII interface */
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_pll_data.pll_1000 = 0x03000101;
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ath79_register_eth(1);
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ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac);
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}
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MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup);
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@ -0,0 +1,39 @@
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -47,6 +47,7 @@ enum ath79_mach_type {
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ATH79_MACH_DIR_825_C1, /* D-Link DIR-825 rev. C1 */
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ATH79_MACH_DIR_835_A1, /* D-Link DIR-835 rev. A1 */
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ATH79_MACH_DRAGINO2, /* Dragino Version 2 */
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+ ATH79_MACH_ESR900, /* EnGenius ESR900 */
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ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */
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ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */
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ATH79_MACH_EAP7660D, /* Senao EAP7660D */
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -335,6 +335,16 @@ config ATH79_MACH_DRAGINO2
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select ATH79_DEV_ETH
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select ATH79_DEV_USB
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+config ATH79_MACH_ESR900
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+ bool "EnGenius ESR900 board support"
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+ select SOC_QCA955X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_SPI
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+
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config ATH79_MACH_EW_DORIN
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bool "embedded wireless Dorin Platform support"
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select SOC_AR933X
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -60,6 +60,7 @@ obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += m
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obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
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obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o
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obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o
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+obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o
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obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o
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obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
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obj-$(CONFIG_ATH79_MACH_EL_M150) += mach-el-m150.o
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