KumiSystems/openwrtv3
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

more AR7 cleanups & fixes

Browse source 
SVN-Revision: 8758
This commit is contained in:
Matteo Croce 2007-09-11 23:50:02 +00:00
parent 1349562f8d
commit 09b45caf09
6 changed files with 84 additions and 103 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

56
target/linux/ar7/files/arch/mips/ar7/clock.c
View file

@ -24,41 +24,41 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/ar7/ar7.h> #include <asm/ar7/ar7.h>
#define BOOT_PLL_SOURCE_MASK 0x3 #define BOOT_PLL_SOURCE_MASK 0x3
#define CPU_PLL_SOURCE_SHIFT 16 #define CPU_PLL_SOURCE_SHIFT 16
#define BUS_PLL_SOURCE_SHIFT 14 #define BUS_PLL_SOURCE_SHIFT 14
#define USB_PLL_SOURCE_SHIFT 18 #define USB_PLL_SOURCE_SHIFT 18
#define DSP_PLL_SOURCE_SHIFT 22 #define DSP_PLL_SOURCE_SHIFT 22
#define BOOT_PLL_SOURCE_AFE 0 #define BOOT_PLL_SOURCE_AFE 0
#define BOOT_PLL_SOURCE_BUS 0 #define BOOT_PLL_SOURCE_BUS 0
#define BOOT_PLL_SOURCE_REF 1 #define BOOT_PLL_SOURCE_REF 1
#define BOOT_PLL_SOURCE_XTAL 2 #define BOOT_PLL_SOURCE_XTAL 2
#define BOOT_PLL_SOURCE_CPU 3 #define BOOT_PLL_SOURCE_CPU 3
#define BOOT_PLL_BYPASS 0x00000020 #define BOOT_PLL_BYPASS 0x00000020
#define BOOT_PLL_ASYNC_MODE 0x02000000 #define BOOT_PLL_ASYNC_MODE 0x02000000
#define BOOT_PLL_2TO1_MODE 0x00008000 #define BOOT_PLL_2TO1_MODE 0x00008000
#define TNETD7200_CLOCK_ID_CPU 0 #define TNETD7200_CLOCK_ID_CPU 0
#define TNETD7200_CLOCK_ID_DSP 1 #define TNETD7200_CLOCK_ID_DSP 1
#define TNETD7200_CLOCK_ID_USB 2 #define TNETD7200_CLOCK_ID_USB 2
#define TNETD7200_DEF_CPU_CLK 211000000 #define TNETD7200_DEF_CPU_CLK 211000000
#define TNETD7200_DEF_DSP_CLK 125000000 #define TNETD7200_DEF_DSP_CLK 125000000
#define TNETD7200_DEF_USB_CLK 48000000 #define TNETD7200_DEF_USB_CLK 48000000
struct tnetd7300_clock { struct tnetd7300_clock {
volatile u32 ctrl; volatile u32 ctrl;
#define PREDIV_MASK 0x001f0000 #define PREDIV_MASK 0x001f0000
#define PREDIV_SHIFT 16 #define PREDIV_SHIFT 16
#define POSTDIV_MASK 0x0000001f #define POSTDIV_MASK 0x0000001f
u32 unused1[3]; u32 unused1[3];
volatile u32 pll; volatile u32 pll;
#define MUL_MASK 0x0000f000 #define MUL_MASK 0x0000f000
#define MUL_SHIFT 12 #define MUL_SHIFT 12
#define PLL_MODE_MASK 0x00000001 #define PLL_MODE_MASK 0x00000001
#define PLL_NDIV 0x00000800 #define PLL_NDIV 0x00000800
#define PLL_DIV 0x00000002 #define PLL_DIV 0x00000002
#define PLL_STATUS 0x00000001 #define PLL_STATUS 0x00000001
u32 unused2[3]; u32 unused2[3];
} __attribute__ ((packed)); } __attribute__ ((packed));

2
target/linux/ar7/files/drivers/mtd/ar7part.c
View file

@ -59,7 +59,7 @@ static int create_mtd_partitions(struct mtd_info *master,
ar7_parts[1].size = master->erasesize; ar7_parts[1].size = master->erasesize;
ar7_parts[1].mask_flags = 0; ar7_parts[1].mask_flags = 0;
do { do { /* Try 10 blocks starting from master->erasesize */
offset = pre_size; offset = pre_size;
master->read(master, offset, master->read(master, offset,
sizeof(header), &len, (u_char *)&header); sizeof(header), &len, (u_char *)&header);

87
target/linux/ar7/files/drivers/net/cpmac.c
View file

@ -86,18 +86,18 @@ struct cpmac_regs {
u32 unused1[56]; u32 unused1[56];
u32 mbp; u32 mbp;
/* MBP bits */ /* MBP bits */
#define MBP_RXPASSCRC 0x40000000 #define MBP_RXPASSCRC 0x40000000
#define MBP_RXQOS 0x20000000 #define MBP_RXQOS 0x20000000
#define MBP_RXNOCHAIN 0x10000000 #define MBP_RXNOCHAIN 0x10000000
#define MBP_RXCMF 0x01000000 #define MBP_RXCMF 0x01000000
#define MBP_RXSHORT 0x00800000 #define MBP_RXSHORT 0x00800000
#define MBP_RXCEF 0x00400000 #define MBP_RXCEF 0x00400000
#define MBP_RXPROMISC 0x00200000 #define MBP_RXPROMISC 0x00200000
#define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16) #define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
#define MBP_RXBCAST 0x00002000 #define MBP_RXBCAST 0x00002000
#define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8) #define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
#define MBP_RXMCAST 0x00000020 #define MBP_RXMCAST 0x00000020
#define MBP_MCASTCHAN(chan) ((chan) & 0x7) #define MBP_MCASTCHAN(chan) ((chan) & 0x7)
u32 unicast_enable; u32 unicast_enable;
u32 unicast_clear; u32 unicast_clear;
u32 max_len; u32 max_len;
@ -107,27 +107,27 @@ struct cpmac_regs {
u32 flow_thre[8]; u32 flow_thre[8];
u32 free_buffer[8]; u32 free_buffer[8];
u32 mac_control; u32 mac_control;
#define MAC_TXPTYPE 0x00000200 #define MAC_TXPTYPE 0x00000200
#define MAC_TXPACE 0x00000040 #define MAC_TXPACE 0x00000040
#define MAC_MII 0x00000020 #define MAC_MII 0x00000020
#define MAC_TXFLOW 0x00000010 #define MAC_TXFLOW 0x00000010
#define MAC_RXFLOW 0x00000008 #define MAC_RXFLOW 0x00000008
#define MAC_MTEST 0x00000004 #define MAC_MTEST 0x00000004
#define MAC_LOOPBACK 0x00000002 #define MAC_LOOPBACK 0x00000002
#define MAC_FDX 0x00000001 #define MAC_FDX 0x00000001
u32 mac_status; u32 mac_status;
#define MACST_QOS 0x4 #define MACST_QOS 0x4
#define MACST_RXFLOW 0x2 #define MACST_RXFLOW 0x2
#define MACST_TXFLOW 0x1 #define MACST_TXFLOW 0x1
u32 emc_control; u32 emc_control;
u32 unused3; u32 unused3;
struct cpmac_int_regs tx_int; struct cpmac_int_regs tx_int;
u32 mac_int_vector; u32 mac_int_vector;
/* Int Status bits */ /* Int Status bits */
#define INTST_STATUS 0x80000 #define INTST_STATUS 0x80000
#define INTST_HOST 0x40000 #define INTST_HOST 0x40000
#define INTST_RX 0x20000 #define INTST_RX 0x20000
#define INTST_TX 0x10000 #define INTST_TX 0x10000
u32 mac_eoi_vector; u32 mac_eoi_vector;
u32 unused4[2]; u32 unused4[2];
struct cpmac_int_regs rx_int; struct cpmac_int_regs rx_int;
@ -158,24 +158,24 @@ struct cpmac_regs {
struct cpmac_mdio_regs { struct cpmac_mdio_regs {
u32 version; u32 version;
volatile u32 control; volatile u32 control;
#define MDIOC_IDLE 0x80000000 #define MDIOC_IDLE 0x80000000
#define MDIOC_ENABLE 0x40000000 #define MDIOC_ENABLE 0x40000000
#define MDIOC_PREAMBLE 0x00100000 #define MDIOC_PREAMBLE 0x00100000
#define MDIOC_FAULT 0x00080000 #define MDIOC_FAULT 0x00080000
#define MDIOC_FAULTDETECT 0x00040000 #define MDIOC_FAULTDETECT 0x00040000
#define MDIOC_INTTEST 0x00020000 #define MDIOC_INTTEST 0x00020000
#define MDIOC_CLKDIV(div) ((div) & 0xff) #define MDIOC_CLKDIV(div) ((div) & 0xff)
volatile u32 alive; volatile u32 alive;
u32 link; u32 link;
struct cpmac_int_regs link_int; struct cpmac_int_regs link_int;
struct cpmac_int_regs user_int; struct cpmac_int_regs user_int;
u32 unused[20]; u32 unused[20];
volatile u32 access; volatile u32 access;
#define MDIO_BUSY 0x80000000 #define MDIO_BUSY 0x80000000
#define MDIO_WRITE 0x40000000 #define MDIO_WRITE 0x40000000
#define MDIO_REG(reg) (((reg) & 0x1f) << 21) #define MDIO_REG(reg) (((reg) & 0x1f) << 21)
#define MDIO_PHY(phy) (((phy) & 0x1f) << 16) #define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
#define MDIO_DATA(data) ((data) & 0xffff) #define MDIO_DATA(data) ((data) & 0xffff)
u32 physel; u32 physel;
} __attribute__ ((packed)); } __attribute__ ((packed));
@ -222,10 +222,10 @@ static int cpmac_stop(struct net_device *dev);
static int cpmac_open(struct net_device *dev); static int cpmac_open(struct net_device *dev);
#undef CPMAC_DEBUG #undef CPMAC_DEBUG
#define CPMAC_LOW_THRESH 32 #define CPMAC_LOW_THRESH 32
#define CPMAC_ALLOC_SIZE 64 #define CPMAC_ALLOC_SIZE 64
#define CPMAC_SKB_SIZE 1518 #define CPMAC_SKB_SIZE 1518
#define CPMAC_TX_RING_SIZE 8 #define CPMAC_TX_RING_SIZE 8
#ifdef CPMAC_DEBUG #ifdef CPMAC_DEBUG
static void cpmac_dump_regs(u32 *base, int count) static void cpmac_dump_regs(u32 *base, int count)
@ -1089,7 +1089,6 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
dev->weight = min(rx_ring_size, 64); dev->weight = min(rx_ring_size, 64);
} }
memset(priv, 0, sizeof(struct cpmac_priv));
spin_lock_init(&priv->lock); spin_lock_init(&priv->lock);
priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff); priv->msg_enable = netif_msg_init(NETIF_MSG_WOL, 0x3fff);
priv->config = pdata; priv->config = pdata;

0
target/linux/ar7/files/include/asm-mips/gpio.h
View file

30
target/linux/ar7/patches-2.6.22/100-board_support.patch
View file

@ -26,37 +26,31 @@ diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig
diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c
--- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200 --- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200 +++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200
@@ -1051,11 +1051,6 @@ @@ -1075,9 +1075,23 @@ void *set_except_vector(int n, void *addr)
unsigned long exception_handlers[32];
unsigned long vi_handlers[64];
-/*
- * As a side effect of the way this is implemented we're limited
- * to interrupt handlers in the address range from
- * KSEG0 <= x < KSEG0 + 256mb on the Nevada. Oh well ...
- */
void *set_except_vector(int n, void *addr)
{
unsigned long handler = (unsigned long) addr;
@@ -1063,9 +1058,15 @@
exception_handlers[n] = handler; exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) { if (n == 0 && cpu_has_divec) {
- *(volatile u32 *)(ebase + 0x200) = 0x08000000 | +#ifdef CONFIG_AR7
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
+ /* lui k0, 0x0000 */ + /* lui k0, 0x0000 */
+ *(volatile u32 *)(CAC_BASE+0x200) = 0x3c1a0000 | (handler >> 16); + *(volatile u32 *)(CAC_BASE+0x200) =
+ 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */ + /* ori k0, 0x0000 */
+ *(volatile u32 *)(CAC_BASE+0x204) = 0x375a0000 | (handler & 0xffff); + *(volatile u32 *)(CAC_BASE+0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */ + /* jr k0 */
+ *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008; + *(volatile u32 *)(CAC_BASE+0x208) = 0x03400008;
+ /* nop */ + /* nop */
+ *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000; + *(volatile u32 *)(CAC_BASE+0x20C) = 0x00000000;
+ flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210); + flush_icache_range(CAC_BASE+0x200, CAC_BASE+0x210);
+#else
*(volatile u32 *)(ebase + 0x200) = 0x08000000 |
(0x03ffffff & (handler >> 2));
flush_icache_range(ebase + 0x200, ebase + 0x204);
+#endif
} }
return (void *)old_handler; return (void *)old_handler;
} }
diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile
--- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200 --- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200 +++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200

12
target/linux/ar7/patches-2.6.22/500-serial_kludge.patch
View file

@ -48,15 +48,3 @@ diff -urN linux-2.6.22.orig/include/linux/serialP.h linux-2.6.22/include/linux/s
#else #else
#define ALPHA_KLUDGE_MCR 0 #define ALPHA_KLUDGE_MCR 0
#endif #endif
diff -urN linux-2.6.22.orig/scripts/setlocalversion linux-2.6.22/scripts/setlocalversion
--- linux-2.6.22.orig/scripts/setlocalversion 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22/scripts/setlocalversion 2007-07-11 03:08:57.000000000 +0200
@@ -1,6 +1,8 @@
#!/bin/sh
# Print additional version information for non-release trees.
+exit 0
+
usage() {
echo "Usage: $0 [srctree]" >&2
exit 1