ralink: Update MT7530 switch driver.
- Support set VLAN ID of each vlan. - Support untag feature. - Replace register address with C MACRO. - There are 8 ports for MT7530 actually. Signed-off-by: Xiongfei Guo <xfguo@credosemi.com> SVN-Revision: 41331
This commit is contained in:
parent
0708bda7c6
commit
021e728962
1 changed files with 186 additions and 82 deletions
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@ -2814,7 +2814,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+#endif
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--- /dev/null
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+++ b/drivers/net/ethernet/ralink/mt7530.c
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@@ -0,0 +1,467 @@
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@@ -0,0 +1,571 @@
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+/*
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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@ -2851,25 +2851,45 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+#include "mt7530.h"
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+
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+#define MT7530_CPU_PORT 6
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+#define MT7530_NUM_PORTS 7
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+#define MT7530_NUM_PORTS 8
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+#define MT7530_NUM_VLANS 16
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+#define MT7530_NUM_VIDS 16
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+#define MT7530_MAX_VID 4095
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+#define MT7530_MIN_VID 0
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+
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+#define REG_ESW_VLAN_VTCR 0x90
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+#define REG_ESW_VLAN_VAWD1 0x94
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+#define REG_ESW_VLAN_VAWD2 0x98
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+/* registers */
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+#define REG_ESW_VLAN_VTCR 0x90
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+#define REG_ESW_VLAN_VAWD1 0x94
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+#define REG_ESW_VLAN_VAWD2 0x98
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+#define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
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+
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+#define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
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+#define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
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+#define REG_ESW_VLAN_VAWD1_VALID BIT(0)
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+
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+/* vlan egress mode */
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+enum {
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+ ETAG_CTRL_UNTAG = 0,
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+ ETAG_CTRL_TAG = 2,
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+ ETAG_CTRL_SWAP = 1,
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+ ETAG_CTRL_STACK = 3,
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+};
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+
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+#define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
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+#define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
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+#define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
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+enum {
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+ /* Global attributes. */
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+ MT7530_ATTR_ENABLE_VLAN,
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+};
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+
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+struct mt7530_port {
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+struct mt7530_port_entry {
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+ u16 pvid;
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+};
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+
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+struct mt7530_vlan {
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+ u8 ports;
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+struct mt7530_vlan_entry {
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+ u16 vid;
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+ u8 member;
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+ u8 etags;
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+};
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+
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+struct mt7530_priv {
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@ -2878,23 +2898,29 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ struct switch_dev swdev;
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+
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+ bool global_vlan_enable;
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+ struct mt7530_vlan vlans[MT7530_NUM_VLANS];
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+ struct mt7530_port ports[MT7530_NUM_PORTS];
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+ struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
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+ struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
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+};
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+
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+struct mt7530_mapping {
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+ char *name;
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+ u8 pvids[6];
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+ u8 vlans[8];
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+ u16 pvids[MT7530_NUM_PORTS];
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+ u8 members[MT7530_NUM_VLANS];
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+ u8 etags[MT7530_NUM_VLANS];
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+ u16 vids[MT7530_NUM_VLANS];
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+} mt7530_defaults[] = {
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+ {
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+ .name = "llllw",
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+ .pvids = { 1, 1, 1, 1, 2, 1 },
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+ .vlans = { 0, 0x6f, 0x50 },
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+ .pvids = { 1, 1, 1, 1, 2, 1, 1 },
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+ .members = { 0x6f, 0x50 },
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+ .etags = { 0x40, 0x40 },
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+ .vids = { 1, 2 },
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+ }, {
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+ .name = "wllll",
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+ .pvids = { 2, 1, 1, 1, 1, 1 },
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+ .vlans = { 0, 0x7e, 0x41 },
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+ .pvids = { 2, 1, 1, 1, 1, 1, 1 },
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+ .members = { 0x7e, 0x41 },
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+ .etags = { 0x40, 0x40 },
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+ .vids = { 1, 2 },
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+ },
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+};
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+
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@ -2921,10 +2947,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+
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+ mt7530->global_vlan_enable = 1;
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+
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+ for (i = 0; i < 6; i++)
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+ mt7530->ports[i].pvid = map->pvids[i];
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+ for (i = 0; i < 8; i++)
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+ mt7530->vlans[i].ports = map->vlans[i];
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530->port_entries[i].pvid = map->pvids[i];
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+
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+ for (i = 0; i < MT7530_NUM_VLANS; i++) {
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+ mt7530->vlan_entries[i].member = map->members[i];
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+ mt7530->vlan_entries[i].etags = map->etags[i];
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+ mt7530->vlan_entries[i].vid = map->vids[i];
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+ }
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+}
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+
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+static int
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@ -2932,8 +2962,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+
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+ memset(priv->ports, 0, sizeof(priv->ports));
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+ memset(priv->vlans, 0, sizeof(priv->vlans));
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+ memset(priv->port_entries, 0, sizeof(priv->port_entries));
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+ memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
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+
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+ return 0;
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+}
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@ -2965,6 +2995,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+static u32
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+mt7530_r32(struct mt7530_priv *priv, u32 reg)
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+{
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+ u32 val;
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+ if (priv->bus) {
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+ u16 high, low;
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+
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@ -2975,7 +3006,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ return (high << 16) | (low & 0xffff);
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+ }
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+
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+ return ioread32(priv->base + reg);
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+ val = ioread32(priv->base + reg);
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+ pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
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+
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+ return val;
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+}
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+
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+static void
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@ -2988,6 +3022,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ return;
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+ }
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+
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+ pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
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+ iowrite32(val, priv->base + reg);
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+}
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+
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@ -3018,8 +3053,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ if (port >= MT7530_NUM_PORTS)
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+ return -EINVAL;
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+
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+ *val = mt7530_r32(priv, 0x2014 + (0x100 * port));
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+ *val &= 0xff;
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+ *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
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+ *val &= 0xfff;
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+
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+ return 0;
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+}
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@ -3030,9 +3065,12 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+
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+ if (port >= MT7530_NUM_PORTS)
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+ return -1;
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+ return -EINVAL;
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+
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+ priv->ports[port].pvid = pvid;
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+ if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
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+ return -EINVAL;
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+
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+ priv->port_entries[port].pvid = pvid;
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+
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+ return 0;
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+}
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@ -3042,26 +3080,38 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+ u32 member;
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+ u32 etags;
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+ int i;
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+
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+ val->len = 0;
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+
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+ if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VIDS)
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+ if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
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+ return -EINVAL;
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+
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+ mt7530_vtcr(priv, 0, val->port_vlan);
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+
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+ member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
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+ member >>= 16;
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+ member &= 0xff;
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+
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+ etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
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+
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+ for (i = 0; i < MT7530_NUM_PORTS; i++) {
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+ struct switch_port *p;
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+ int etag;
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+
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+ if (!(member & BIT(i)))
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+ continue;
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+
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+ p = &val->value.ports[val->len++];
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+ p->id = i;
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+ p->flags = 0;
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+
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+ etag = (etags >> (i * 2)) & 0x3;
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+
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+ if (etag == ETAG_CTRL_TAG)
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+ p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
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+ else if (etag != ETAG_CTRL_UNTAG)
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+ printk("vlan egress tag control neither untag nor tag.\n");
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+ }
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+
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+ return 0;
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@ -3071,10 +3121,11 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+ int ports = 0;
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+ u8 member = 0;
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+ u8 etags = 0;
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+ int i;
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+
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+ if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VIDS ||
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+ if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
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+ val->len > MT7530_NUM_PORTS)
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+ return -EINVAL;
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+
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+ if (p->id >= MT7530_NUM_PORTS)
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+ return -EINVAL;
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+
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+ ports |= BIT(p->id);
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+ }
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+ priv->vlans[val->port_vlan].ports = ports;
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+ member |= BIT(p->id);
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+
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+ if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
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+ etags |= BIT(p->id);
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+ }
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+ priv->vlan_entries[val->port_vlan].member = member;
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+ priv->vlan_entries[val->port_vlan].etags = etags;
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+
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+ return 0;
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+}
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+
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+static int
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+mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+ int vlan;
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+ u16 vid;
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+
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+ vlan = val->port_vlan;
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+ vid = (u16)val->value.i;
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+
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+ if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
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+ return -EINVAL;
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+
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+ if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
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+ return -EINVAL;
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+
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+ priv->vlan_entries[vlan].vid = vid;
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+ return 0;
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+}
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+
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+static int
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+mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
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+ struct switch_val *val)
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+ u32 vid;
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+ int vlan;
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+
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+ vlan = val->port_vlan;
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+
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+ vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
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+ if (vlan & 1)
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+ vid = vid >> 12;
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+ vid &= 0xfff;
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+
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+ val->value.i = vid;
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+ return 0;
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+}
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+
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@ -3095,79 +3190,80 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
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+mt7530_apply_config(struct switch_dev *dev)
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+{
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+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
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+ int i;
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+ int i, j;
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+
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+ if (!priv->global_vlan_enable) {
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+ mt7530_w32(priv, 0x2004, 0xff000);
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+ mt7530_w32(priv, 0x2104, 0xff000);
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+ mt7530_w32(priv, 0x2204, 0xff000);
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+ mt7530_w32(priv, 0x2304, 0xff000);
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+ mt7530_w32(priv, 0x2404, 0xff000);
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+ mt7530_w32(priv, 0x2504, 0xff000);
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+ mt7530_w32(priv, 0x2604, 0xff000);
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+ mt7530_w32(priv, 0x2010, 0x810000c);
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+ mt7530_w32(priv, 0x2110, 0x810000c);
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+ mt7530_w32(priv, 0x2210, 0x810000c);
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+ mt7530_w32(priv, 0x2310, 0x810000c);
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+ mt7530_w32(priv, 0x2410, 0x810000c);
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+ mt7530_w32(priv, 0x2510, 0x810000c);
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+ mt7530_w32(priv, 0x2610, 0x810000c);
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+ return 0;
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0000);
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+
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x8100000c);
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+
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+ return 0;
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+ }
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+
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+ // LAN/WAN ports as security mode
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+ mt7530_w32(priv, 0x2004, 0xff0003);
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+ mt7530_w32(priv, 0x2104, 0xff0003);
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+ mt7530_w32(priv, 0x2204, 0xff0003);
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+ mt7530_w32(priv, 0x2304, 0xff0003);
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+ mt7530_w32(priv, 0x2404, 0xff0003);
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+ mt7530_w32(priv, 0x2504, 0xff0003);
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+ // LAN/WAN ports as transparent port
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+ mt7530_w32(priv, 0x2010, 0x810000c0);
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+ mt7530_w32(priv, 0x2110, 0x810000c0);
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+ mt7530_w32(priv, 0x2210, 0x810000c0);
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+ mt7530_w32(priv, 0x2310, 0x810000c0);
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+ mt7530_w32(priv, 0x2410, 0x810000c0);
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+ mt7530_w32(priv, 0x2510, 0x810000c0);
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+ /* set all ports as security mode */
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
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+
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+ // set CPU/P7 port as user port
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+ mt7530_w32(priv, 0x2610, 0x81000000);
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+ mt7530_w32(priv, 0x2710, 0x81000000);
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+
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+ mt7530_w32(priv, 0x2604, 0x20ff0003);
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+ mt7530_w32(priv, 0x2704, 0x20ff0003);
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+ mt7530_w32(priv, 0x2610, 0x81000000);
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+ /* set all ports as user port */
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x81000000);
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+
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+ for (i = 0; i < MT7530_NUM_VLANS; i++) {
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+ u8 ports = priv->vlans[i].ports;
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+ u32 val = mt7530_r32(priv, 0x100 + 4 * (i / 2));
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+ u16 vid = priv->vlan_entries[i].vid;
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+ u8 member = priv->vlan_entries[i].member;
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+ u8 etags = priv->vlan_entries[i].etags;
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+ u32 val;
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+
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+ /* vid of vlan */
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+ val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(i));
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+ if (i % 2 == 0) {
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+ val &= 0xfff000;
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+ val |= i;
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+ val |= vid;
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+ } else {
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+ val &= 0xfff;
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+ val |= (i << 12);
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+ val |= (vid << 12);
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+ }
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+ mt7530_w32(priv, 0x100 + 4 * (i / 2), val);
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+ mt7530_w32(priv, REG_ESW_VLAN_VTIM(i), val);
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+
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+ if (ports)
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+ mt7530_w32(priv, REG_ESW_VLAN_VAWD1, BIT(30) | (ports << 16) | BIT(0));
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+ /* vlan port membership */
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+ if (member)
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+ mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
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+ REG_ESW_VLAN_VAWD1_VTAG_EN | (member << 16) |
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+ REG_ESW_VLAN_VAWD1_VALID);
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+ else
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+ mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
|
||||
+
|
||||
+ /* egress mode */
|
||||
+ val = 0;
|
||||
+ for (j = 0; j < MT7530_NUM_PORTS; j++) {
|
||||
+ if (etags & BIT(j))
|
||||
+ val |= ETAG_CTRL_TAG << (j * 2);
|
||||
+ else
|
||||
+ val |= ETAG_CTRL_UNTAG << (j * 2);
|
||||
+ }
|
||||
+ mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
|
||||
+
|
||||
+ /* write to vlan table */
|
||||
+ mt7530_vtcr(priv, 1, i);
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < MT7530_NUM_PORTS; i++)
|
||||
+ mt7530_w32(priv, 0x2014 + (0x100 * i), 0x10000 | priv->ports[i].pvid);
|
||||
+ /* Port Default PVID */
|
||||
+ for (i = 0; i < MT7530_NUM_PORTS; i++) {
|
||||
+ u32 val;
|
||||
+ val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
|
||||
+ val &= ~0xfff;
|
||||
+ val |= priv->port_entries[i].pvid;
|
||||
+ mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+mt7530_get_port_link(struct switch_dev *dev, int port,
|
||||
+ struct switch_port_link *link)
|
||||
+ struct switch_port_link *link)
|
||||
+{
|
||||
+ struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
|
||||
+ u32 speed, pmsr;
|
||||
|
@ -3216,6 +3312,14 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
|
|||
+};
|
||||
+
|
||||
+static const struct switch_attr mt7530_vlan[] = {
|
||||
+ {
|
||||
+ .type = SWITCH_TYPE_INT,
|
||||
+ .name = "vid",
|
||||
+ .description = "VLAN ID (0-4094)",
|
||||
+ .set = mt7530_set_vid,
|
||||
+ .get = mt7530_get_vid,
|
||||
+ .max = 4094,
|
||||
+ },
|
||||
+};
|
||||
+
|
||||
+static const struct switch_dev_ops mt7530_ops = {
|
||||
|
|
Loading…
Reference in a new issue