118 lines
2.8 KiB
Diff
118 lines
2.8 KiB
Diff
|
From 7a30e00a278fe94ac8e42d0967ffde99d1ab74ee Mon Sep 17 00:00:00 2001
|
||
|
|
From: John Crispin <blogic@openwrt.org>
|
||
|
|
Date: Thu, 21 Mar 2013 17:47:07 +0100
|
||
|
|
Subject: [PATCH 117/137] DT: MIPS: ralink: clean up RT3050 dtsi and dts file
|
||
|
|
|
||
|
|
* remove nodes for cores whose drivers are not upstream yet
|
||
|
|
* add compat string for an additional soc
|
||
|
|
* fix a whitespace error
|
||
|
|
|
||
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||
|
|
Acked-by: Grant Likely <grant.likely@secretlab.ca>
|
||
|
|
Patchwork: http://patchwork.linux-mips.org/patch/5186/
|
||
|
|
---
|
||
|
|
arch/mips/ralink/dts/rt3050.dtsi | 52 ++--------------------------------
|
||
|
|
arch/mips/ralink/dts/rt3052_eval.dts | 10 ++-----
|
||
|
|
2 files changed, 4 insertions(+), 58 deletions(-)
|
||
|
|
|
||
|
|
--- a/arch/mips/ralink/dts/rt3050.dtsi
|
||
|
|
+++ b/arch/mips/ralink/dts/rt3050.dtsi
|
||
|
|
@@ -1,7 +1,7 @@
|
||
|
|
/ {
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
- compatible = "ralink,rt3050-soc", "ralink,rt3052-soc";
|
||
|
|
+ compatible = "ralink,rt3050-soc", "ralink,rt3052-soc", "ralink,rt3350-soc";
|
||
|
|
|
||
|
|
cpus {
|
||
|
|
cpu@0 {
|
||
|
|
@@ -9,10 +9,6 @@
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
- chosen {
|
||
|
|
- bootargs = "console=ttyS0,57600 init=/init";
|
||
|
|
- };
|
||
|
|
-
|
||
|
|
cpuintc: cpuintc@0 {
|
||
|
|
#address-cells = <0>;
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
@@ -23,7 +19,7 @@
|
||
|
|
palmbus@10000000 {
|
||
|
|
compatible = "palmbus";
|
||
|
|
reg = <0x10000000 0x200000>;
|
||
|
|
- ranges = <0x0 0x10000000 0x1FFFFF>;
|
||
|
|
+ ranges = <0x0 0x10000000 0x1FFFFF>;
|
||
|
|
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
@@ -33,11 +29,6 @@
|
||
|
|
reg = <0x0 0x100>;
|
||
|
|
};
|
||
|
|
|
||
|
|
- timer@100 {
|
||
|
|
- compatible = "ralink,rt3052-wdt", "ralink,rt2880-wdt";
|
||
|
|
- reg = <0x100 0x100>;
|
||
|
|
- };
|
||
|
|
-
|
||
|
|
intc: intc@200 {
|
||
|
|
compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
|
||
|
|
reg = <0x200 0x100>;
|
||
|
|
@@ -54,45 +45,6 @@
|
||
|
|
reg = <0x300 0x100>;
|
||
|
|
};
|
||
|
|
|
||
|
|
- gpio0: gpio@600 {
|
||
|
|
- compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
|
||
|
|
- reg = <0x600 0x34>;
|
||
|
|
-
|
||
|
|
- gpio-controller;
|
||
|
|
- #gpio-cells = <2>;
|
||
|
|
-
|
||
|
|
- ralink,ngpio = <24>;
|
||
|
|
- ralink,regs = [ 00 04 08 0c
|
||
|
|
- 20 24 28 2c
|
||
|
|
- 30 34 ];
|
||
|
|
- };
|
||
|
|
-
|
||
|
|
- gpio1: gpio@638 {
|
||
|
|
- compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
|
||
|
|
- reg = <0x638 0x24>;
|
||
|
|
-
|
||
|
|
- gpio-controller;
|
||
|
|
- #gpio-cells = <2>;
|
||
|
|
-
|
||
|
|
- ralink,ngpio = <16>;
|
||
|
|
- ralink,regs = [ 00 04 08 0c
|
||
|
|
- 10 14 18 1c
|
||
|
|
- 20 24 ];
|
||
|
|
- };
|
||
|
|
-
|
||
|
|
- gpio2: gpio@660 {
|
||
|
|
- compatible = "ralink,rt3052-gpio", "ralink,rt2880-gpio";
|
||
|
|
- reg = <0x660 0x24>;
|
||
|
|
-
|
||
|
|
- gpio-controller;
|
||
|
|
- #gpio-cells = <2>;
|
||
|
|
-
|
||
|
|
- ralink,ngpio = <12>;
|
||
|
|
- ralink,regs = [ 00 04 08 0c
|
||
|
|
- 10 14 18 1c
|
||
|
|
- 20 24 ];
|
||
|
|
- };
|
||
|
|
-
|
||
|
|
uartlite@c00 {
|
||
|
|
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
|
||
|
|
reg = <0xc00 0x100>;
|
||
|
|
--- a/arch/mips/ralink/dts/rt3052_eval.dts
|
||
|
|
+++ b/arch/mips/ralink/dts/rt3052_eval.dts
|
||
|
|
@@ -3,8 +3,6 @@
|
||
|
|
/include/ "rt3050.dtsi"
|
||
|
|
|
||
|
|
/ {
|
||
|
|
- #address-cells = <1>;
|
||
|
|
- #size-cells = <1>;
|
||
|
|
compatible = "ralink,rt3052-eval-board", "ralink,rt3052-soc";
|
||
|
|
model = "Ralink RT3052 evaluation board";
|
||
|
|
|