118 lines
4.2 KiB
Diff
118 lines
4.2 KiB
Diff
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From: Arend van Spriel <arend.vanspriel@broadcom.com>
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Date: Wed, 5 Sep 2018 09:48:58 +0200
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Subject: [PATCH] brcmfmac: fix for proper support of 160MHz bandwidth
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Decoding of firmware channel information was not complete for 160MHz
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support. This resulted in the following warning:
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WARNING: CPU: 2 PID: 2222 at .../broadcom/brcm80211/brcmutil/d11.c:196
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brcmu_d11ac_decchspec+0x2e/0x100 [brcmutil]
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Modules linked in: brcmfmac(O) brcmutil(O) sha256_generic cfg80211 ...
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CPU: 2 PID: 2222 Comm: kworker/2:0 Tainted: G O
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4.17.0-wt-testing-x64-00002-gf1bed50 #1
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Hardware name: Dell Inc. Latitude E6410/07XJP9, BIOS A07 02/15/2011
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Workqueue: events request_firmware_work_func
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RIP: 0010:brcmu_d11ac_decchspec+0x2e/0x100 [brcmutil]
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RSP: 0018:ffffc90000047bd0 EFLAGS: 00010206
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RAX: 000000000000e832 RBX: ffff8801146fe910 RCX: ffff8801146fd3c0
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RDX: 0000000000002800 RSI: 0000000000000070 RDI: ffffc90000047c30
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RBP: ffffc90000047bd0 R08: 0000000000000000 R09: ffffffffa0798c80
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R10: ffff88012bca55e0 R11: ffff880110a4ea00 R12: ffff8801146f8000
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R13: ffffc90000047c30 R14: ffff8801146fe930 R15: ffff8801138e02e0
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FS: 0000000000000000(0000) GS:ffff88012bc80000(0000) knlGS:0000000000000000
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CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
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CR2: 00007f18ce8b8070 CR3: 000000000200a003 CR4: 00000000000206e0
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Call Trace:
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brcmf_setup_wiphybands+0x212/0x780 [brcmfmac]
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brcmf_cfg80211_attach+0xae2/0x11a0 [brcmfmac]
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brcmf_attach+0x1fc/0x4b0 [brcmfmac]
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? __kmalloc+0x13c/0x1c0
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brcmf_pcie_setup+0x99b/0xe00 [brcmfmac]
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brcmf_fw_request_done+0x16a/0x1f0 [brcmfmac]
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request_firmware_work_func+0x36/0x60
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process_one_work+0x146/0x350
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worker_thread+0x4a/0x3b0
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kthread+0x102/0x140
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? process_one_work+0x350/0x350
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? kthread_bind+0x20/0x20
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ret_from_fork+0x35/0x40
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Code: 66 90 0f b7 07 55 48 89 e5 89 c2 88 47 02 88 47 03 66 81 e2 00 38
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66 81 fa 00 18 74 6e 66 81 fa 00 20 74 39 66 81 fa 00 10 74 14 <0f>
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0b 66 25 00 c0 74 20 66 3d 00 c0 75 20 c6 47 04 01 5d c3 66
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---[ end trace 550c46682415b26d ]---
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brcmfmac: brcmf_construct_chaninfo: Ignoring unexpected firmware channel 50
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This patch adds the missing stuff to properly handle this.
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Reviewed-by: Hante Meuleman <hante.meuleman@broadcom.com>
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Reviewed-by: Pieter-Paul Giesberts <pieter-paul.giesberts@broadcom.com>
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Reviewed-by: Franky Lin <franky.lin@broadcom.com>
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Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
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---
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.../net/wireless/broadcom/brcm80211/brcmutil/d11.c | 34 +++++++++++++++++++++-
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.../broadcom/brcm80211/include/brcmu_wifi.h | 2 ++
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2 files changed, 35 insertions(+), 1 deletion(-)
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--- a/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
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+++ b/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c
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@@ -77,6 +77,8 @@ static u16 d11ac_bw(enum brcmu_chan_bw b
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return BRCMU_CHSPEC_D11AC_BW_40;
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case BRCMU_CHAN_BW_80:
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return BRCMU_CHSPEC_D11AC_BW_80;
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+ case BRCMU_CHAN_BW_160:
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+ return BRCMU_CHSPEC_D11AC_BW_160;
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default:
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WARN_ON(1);
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}
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@@ -190,8 +192,38 @@ static void brcmu_d11ac_decchspec(struct
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break;
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}
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break;
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- case BRCMU_CHSPEC_D11AC_BW_8080:
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case BRCMU_CHSPEC_D11AC_BW_160:
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+ switch (ch->sb) {
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+ case BRCMU_CHAN_SB_LLL:
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+ ch->control_ch_num -= CH_70MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_LLU:
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+ ch->control_ch_num -= CH_50MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_LUL:
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+ ch->control_ch_num -= CH_30MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_LUU:
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+ ch->control_ch_num -= CH_10MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_ULL:
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+ ch->control_ch_num += CH_10MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_ULU:
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+ ch->control_ch_num += CH_30MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_UUL:
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+ ch->control_ch_num += CH_50MHZ_APART;
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+ break;
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+ case BRCMU_CHAN_SB_UUU:
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+ ch->control_ch_num += CH_70MHZ_APART;
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+ break;
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+ default:
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+ WARN_ON_ONCE(1);
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+ break;
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+ }
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+ break;
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+ case BRCMU_CHSPEC_D11AC_BW_8080:
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default:
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WARN_ON_ONCE(1);
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break;
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--- a/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
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+++ b/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h
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@@ -29,6 +29,8 @@
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#define CH_UPPER_SB 0x01
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#define CH_LOWER_SB 0x02
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#define CH_EWA_VALID 0x04
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+#define CH_70MHZ_APART 14
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+#define CH_50MHZ_APART 10
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#define CH_30MHZ_APART 6
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#define CH_20MHZ_APART 4
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#define CH_10MHZ_APART 2
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