2017-03-13 12:30:10 +00:00
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From 7292bf171cdf2fb48607058f12ddd0d812a87428 Mon Sep 17 00:00:00 2001
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2017-02-16 11:25:25 +00:00
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From: Matthew McClintock <mmcclint@qca.qualcomm.com>
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Date: Fri, 29 Apr 2016 12:48:02 -0500
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2017-03-13 12:30:10 +00:00
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Subject: [PATCH 19/69] qcom: ipq4019: use correct clock for i2c bus 0
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2017-02-16 11:25:25 +00:00
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For the record the mapping is as follows:
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QUP0 = SPI QUP1
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QUP1 = SPI QUP2
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QUP2 = I2C QUP1
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QUP3 = I2C QUP2
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Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
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---
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2017-03-13 12:30:10 +00:00
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
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2017-02-16 11:25:25 +00:00
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -175,7 +175,7 @@
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reg = <0x78b7000 0x6000>;
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP1_AHB_CLK>,
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- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
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+ <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
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clock-names = "iface", "core";
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#address-cells = <1>;
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#size-cells = <0>;
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