2009-01-13 13:01:26 +00:00
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From 7421bd5ad39586fe58e487477e154275479b6821 Mon Sep 17 00:00:00 2001
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2009-01-03 13:48:27 +00:00
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From: Gabor Juhos <juhosg@openwrt.org>
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2009-01-07 18:17:27 +00:00
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Date: Mon, 5 Jan 2009 11:13:04 +0100
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2009-01-13 13:01:26 +00:00
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Subject: [PATCH v3 09/11] ath9k: fix ar5416Addac_9100 values
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2009-01-03 13:48:27 +00:00
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Writing the register at offset 0x98c4 causes a deadlock on the AR913x
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2009-01-07 18:17:27 +00:00
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SoCs. Although i don't have detailed knowledge about these registers,
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but if i change the register offset according to the 'ar5416Addac' table,
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it works. Additionally there is no reference to the 0x98c4 elsewhere.
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2009-01-03 13:48:27 +00:00
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2009-01-13 13:01:26 +00:00
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Changes-licensed-under: ISC
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2009-01-03 13:48:27 +00:00
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
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---
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drivers/net/wireless/ath9k/initvals.h | 2 +-
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1 files changed, 1 insertions(+), 1 deletions(-)
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--- a/drivers/net/wireless/ath9k/initvals.h
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+++ b/drivers/net/wireless/ath9k/initvals.h
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2009-01-07 18:17:27 +00:00
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@@ -658,7 +658,7 @@ static const u32 ar5416Addac_9100[][2] =
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2009-01-03 13:48:27 +00:00
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{0x0000989c, 0x00000000 },
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{0x0000989c, 0x00000000 },
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{0x0000989c, 0x00000000 },
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- {0x000098c4, 0x00000000 },
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+ {0x000098cc, 0x00000000 },
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};
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2009-01-07 18:17:27 +00:00
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static const u32 ar5416Modes[][6] = {
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