2013-03-04 11:48:08 +00:00
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From 1dece618b107f5db28c8f63d4d32424dd18324d1 Mon Sep 17 00:00:00 2001
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2013-02-21 17:47:15 +00:00
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From: Gabor Juhos <juhosg@openwrt.org>
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2013-03-04 11:48:08 +00:00
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Date: Mon, 4 Feb 2013 11:56:53 +0100
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Subject: [PATCH] MIPS: ath79: move global PCI defines into a common header
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commit ad4ce92e919f7ad5561a2060deb58899de58b40c upstream.
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2013-02-21 17:47:15 +00:00
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The constants will be used by a subsequent patch.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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2013-03-04 11:48:08 +00:00
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Patchwork: http://patchwork.linux-mips.org/patch/4907/
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Signed-off-by: John Crispin <blogic@openwrt.org>
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2013-02-21 17:47:15 +00:00
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---
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 24 ++++++++++++++++++++++++
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arch/mips/pci/pci-ar71xx.c | 16 ----------------
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arch/mips/pci/pci-ar724x.c | 8 --------
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3 files changed, 24 insertions(+), 24 deletions(-)
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -41,11 +41,35 @@
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#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
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#define AR71XX_RESET_SIZE 0x100
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+#define AR71XX_PCI_MEM_BASE 0x10000000
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+#define AR71XX_PCI_MEM_SIZE 0x07000000
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+
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+#define AR71XX_PCI_WIN0_OFFS 0x10000000
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+#define AR71XX_PCI_WIN1_OFFS 0x11000000
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+#define AR71XX_PCI_WIN2_OFFS 0x12000000
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+#define AR71XX_PCI_WIN3_OFFS 0x13000000
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+#define AR71XX_PCI_WIN4_OFFS 0x14000000
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+#define AR71XX_PCI_WIN5_OFFS 0x15000000
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+#define AR71XX_PCI_WIN6_OFFS 0x16000000
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+#define AR71XX_PCI_WIN7_OFFS 0x07000000
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+
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+#define AR71XX_PCI_CFG_BASE \
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+ (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
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+#define AR71XX_PCI_CFG_SIZE 0x100
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+
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#define AR7240_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
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#define AR7240_USB_CTRL_SIZE 0x100
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#define AR7240_OHCI_BASE 0x1b000000
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#define AR7240_OHCI_SIZE 0x1000
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+#define AR724X_PCI_MEM_BASE 0x10000000
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+#define AR724X_PCI_MEM_SIZE 0x04000000
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+
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+#define AR724X_PCI_CFG_BASE 0x14000000
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+#define AR724X_PCI_CFG_SIZE 0x1000
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+#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
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+#define AR724X_PCI_CTRL_SIZE 0x100
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+
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#define AR724X_EHCI_BASE 0x1b000000
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#define AR724X_EHCI_SIZE 0x1000
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--- a/arch/mips/pci/pci-ar71xx.c
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+++ b/arch/mips/pci/pci-ar71xx.c
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@@ -25,22 +25,6 @@
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/pci.h>
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-#define AR71XX_PCI_MEM_BASE 0x10000000
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-#define AR71XX_PCI_MEM_SIZE 0x07000000
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-
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-#define AR71XX_PCI_WIN0_OFFS 0x10000000
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-#define AR71XX_PCI_WIN1_OFFS 0x11000000
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-#define AR71XX_PCI_WIN2_OFFS 0x12000000
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-#define AR71XX_PCI_WIN3_OFFS 0x13000000
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-#define AR71XX_PCI_WIN4_OFFS 0x14000000
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-#define AR71XX_PCI_WIN5_OFFS 0x15000000
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-#define AR71XX_PCI_WIN6_OFFS 0x16000000
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-#define AR71XX_PCI_WIN7_OFFS 0x07000000
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-
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-#define AR71XX_PCI_CFG_BASE \
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- (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)
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-#define AR71XX_PCI_CFG_SIZE 0x100
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-
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#define AR71XX_PCI_REG_CRP_AD_CBE 0x00
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#define AR71XX_PCI_REG_CRP_WRDATA 0x04
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#define AR71XX_PCI_REG_CRP_RDDATA 0x08
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--- a/arch/mips/pci/pci-ar724x.c
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+++ b/arch/mips/pci/pci-ar724x.c
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@@ -17,14 +17,6 @@
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/pci.h>
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-#define AR724X_PCI_CFG_BASE 0x14000000
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-#define AR724X_PCI_CFG_SIZE 0x1000
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-#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
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-#define AR724X_PCI_CTRL_SIZE 0x100
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-
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-#define AR724X_PCI_MEM_BASE 0x10000000
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-#define AR724X_PCI_MEM_SIZE 0x04000000
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-
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#define AR724X_PCI_REG_RESET 0x18
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#define AR724X_PCI_REG_INT_STATUS 0x4c
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#define AR724X_PCI_REG_INT_MASK 0x50
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