2014-08-11 11:36:53 +00:00
|
|
|
/ {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
compatible = "brcm,bcm6358";
|
|
|
|
|
2014-08-11 11:37:01 +00:00
|
|
|
aliases {
|
|
|
|
pflash = &pflash;
|
2015-02-27 17:39:49 +00:00
|
|
|
gpio0 = &gpio0;
|
|
|
|
gpio1 = &gpio1;
|
2014-08-11 11:37:01 +00:00
|
|
|
};
|
|
|
|
|
2014-08-11 11:36:53 +00:00
|
|
|
cpus {
|
2014-12-01 00:51:53 +00:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2014-08-11 11:36:53 +00:00
|
|
|
cpu@0 {
|
|
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
2014-12-01 00:51:53 +00:00
|
|
|
device_type = "cpu";
|
|
|
|
reg = <0>;
|
2014-08-11 11:36:53 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
cpu@1 {
|
|
|
|
compatible = "brcm,bmips4350", "mips,mips4Kc";
|
2014-12-01 00:51:53 +00:00
|
|
|
device_type = "cpu";
|
|
|
|
reg = <1>;
|
2014-08-11 11:36:53 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2014-12-01 00:52:07 +00:00
|
|
|
cpu_intc: interrupt-controller {
|
|
|
|
#address-cells = <0>;
|
|
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <1>;
|
|
|
|
};
|
|
|
|
|
2014-08-11 11:36:53 +00:00
|
|
|
memory { device_type = "memory"; reg = <0 0>; };
|
|
|
|
|
2014-08-11 11:37:01 +00:00
|
|
|
pflash: nor@1e000000 {
|
|
|
|
compatible = "cfi-flash";
|
|
|
|
reg = <0x1e000000 0x2000000>;
|
|
|
|
bank-width = <2>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2014-08-11 11:36:53 +00:00
|
|
|
ubus@fff00000 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
2014-12-01 00:51:56 +00:00
|
|
|
ranges;
|
2014-08-11 11:36:53 +00:00
|
|
|
compatible = "simple-bus";
|
2014-12-01 00:52:07 +00:00
|
|
|
|
|
|
|
periph_intc: interrupt-controller@fffe000c {
|
2016-06-15 10:37:33 +00:00
|
|
|
compatible = "brcm,bcm6345-l1-intc";
|
2014-12-01 00:52:07 +00:00
|
|
|
reg = <0xfffe000c 0x8>,
|
|
|
|
<0xfffe0038 0x8>;
|
|
|
|
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <1>;
|
|
|
|
|
|
|
|
interrupt-parent = <&cpu_intc>;
|
|
|
|
interrupts = <2>, <3>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ext_intc0: interrupt-controller@fffe0014 {
|
|
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
|
|
reg = <0xfffe0014 0x4>;
|
|
|
|
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
|
|
interrupts = <25>, <26>, <27>, <28>;
|
|
|
|
};
|
|
|
|
|
|
|
|
ext_intc1: interrupt-controller@fffe001c {
|
|
|
|
compatible = "brcm,bcm6345-ext-intc";
|
|
|
|
reg = <0xfffe001c 0x4>;
|
|
|
|
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
|
|
|
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
|
|
interrupts = <20>, <21>;
|
|
|
|
};
|
2015-02-27 17:39:49 +00:00
|
|
|
|
|
|
|
gpio1: gpio-controller@fffe0080 {
|
|
|
|
compatible = "brcm,bcm6345-gpio";
|
|
|
|
reg = <0xfffe0080 4>, <0xfffe0088 4>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
ngpios = <8>;
|
2016-12-18 12:54:17 +00:00
|
|
|
|
|
|
|
interrupts-extended = <&ext_intc1 0 0>,
|
|
|
|
<&ext_intc1 1 0>,
|
|
|
|
<&ext_intc0 0 0>,
|
|
|
|
<&ext_intc0 1 0>,
|
|
|
|
<&ext_intc0 2 0>,
|
|
|
|
<&ext_intc0 3 0>;
|
|
|
|
interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3",
|
|
|
|
"gpio4", "gpio5";
|
2015-02-27 17:39:49 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
gpio0: gpio-controller@fffe0084 {
|
|
|
|
compatible = "brcm,bcm6345-gpio";
|
|
|
|
reg = <0xfffe0084 4>, <0xfffe008c 4>;
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
2014-08-11 11:36:53 +00:00
|
|
|
};
|
|
|
|
};
|