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openwrtv3/target/linux/layerscape/patches-4.4/3023-powerpc-fsl-move-mpc85xx.h-to-include-linux-fsl.patch

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layerscape: add 64b/32b target for ls1043ardb device Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
2016-10-28 16:14:32 +00:00
From 2d8816af7c19882f62c4a25edb9fcc9040312f96 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Tue, 12 Apr 2016 14:21:19 +0800
Subject: [PATCH 23/70] powerpc/fsl: move mpc85xx.h to include/linux/fsl
commit 2a76fbe35c14717b4f4a145e0ab83517b1f4ab4a
[context adjustment]
[doesn't apply arch/powerpc/kernel/cpu_setup_fsl_booke.S]
[doesn't apply arch/powerpc/sysdev/mpic_timer.c]
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as
a common header file. It has been used for mpc85xx and it will
be used for ARM-based SoC as well.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
---
arch/powerpc/include/asm/mpc85xx.h | 95 ------------------------------
drivers/clk/clk-qoriq.c | 2 +-
drivers/i2c/busses/i2c-mpc.c | 2 +-
drivers/iommu/fsl_pamu.c | 2 +-
drivers/net/ethernet/freescale/gianfar.c | 2 +-
include/linux/fsl/svr.h | 95 ++++++++++++++++++++++++++++++
6 files changed, 99 insertions(+), 99 deletions(-)
delete mode 100644 arch/powerpc/include/asm/mpc85xx.h
create mode 100644 include/linux/fsl/svr.h
--- a/arch/powerpc/include/asm/mpc85xx.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * MPC85xx cpu type detection
- *
- * Copyright 2011-2012 Freescale Semiconductor, Inc.
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef __ASM_PPC_MPC85XX_H
-#define __ASM_PPC_MPC85XX_H
-
-#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
-#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
-#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
-
-/* Some parts define SVR[0:23] as the SOC version */
-#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
-
-#define SVR_8533 0x803400
-#define SVR_8535 0x803701
-#define SVR_8536 0x803700
-#define SVR_8540 0x803000
-#define SVR_8541 0x807200
-#define SVR_8543 0x803200
-#define SVR_8544 0x803401
-#define SVR_8545 0x803102
-#define SVR_8547 0x803101
-#define SVR_8548 0x803100
-#define SVR_8555 0x807100
-#define SVR_8560 0x807000
-#define SVR_8567 0x807501
-#define SVR_8568 0x807500
-#define SVR_8569 0x808000
-#define SVR_8572 0x80E000
-#define SVR_P1010 0x80F100
-#define SVR_P1011 0x80E500
-#define SVR_P1012 0x80E501
-#define SVR_P1013 0x80E700
-#define SVR_P1014 0x80F101
-#define SVR_P1017 0x80F700
-#define SVR_P1020 0x80E400
-#define SVR_P1021 0x80E401
-#define SVR_P1022 0x80E600
-#define SVR_P1023 0x80F600
-#define SVR_P1024 0x80E402
-#define SVR_P1025 0x80E403
-#define SVR_P2010 0x80E300
-#define SVR_P2020 0x80E200
-#define SVR_P2040 0x821000
-#define SVR_P2041 0x821001
-#define SVR_P3041 0x821103
-#define SVR_P4040 0x820100
-#define SVR_P4080 0x820000
-#define SVR_P5010 0x822100
-#define SVR_P5020 0x822000
-#define SVR_P5021 0X820500
-#define SVR_P5040 0x820400
-#define SVR_T4240 0x824000
-#define SVR_T4120 0x824001
-#define SVR_T4160 0x824100
-#define SVR_T4080 0x824102
-#define SVR_C291 0x850000
-#define SVR_C292 0x850020
-#define SVR_C293 0x850030
-#define SVR_B4860 0X868000
-#define SVR_G4860 0x868001
-#define SVR_G4060 0x868003
-#define SVR_B4440 0x868100
-#define SVR_G4440 0x868101
-#define SVR_B4420 0x868102
-#define SVR_B4220 0x868103
-#define SVR_T1040 0x852000
-#define SVR_T1041 0x852001
-#define SVR_T1042 0x852002
-#define SVR_T1020 0x852100
-#define SVR_T1021 0x852101
-#define SVR_T1022 0x852102
-#define SVR_T2080 0x853000
-#define SVR_T2081 0x853100
-
-#define SVR_8610 0x80A000
-#define SVR_8641 0x809000
-#define SVR_8641D 0x809001
-
-#define SVR_9130 0x860001
-#define SVR_9131 0x860000
-#define SVR_9132 0x861000
-#define SVR_9232 0x861400
-
-#define SVR_Unknown 0xFFFFFF
-
-#endif
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -13,6 +13,7 @@
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/fsl/guts.h>
+#include <linux/fsl/svr.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
kernel: bump to 4.4.35 Refresh patches on all 4.4 supported platforms. 077-0005-bgmac-stop-clearing-DMA-receive-control-register-rig.patch removed as now upstream. Compile & run tested: ar71xx - Archer C7 v2 Signed-off-by: Kevin Darbyshire-Bryant <kevin@darbyshire-bryant.me.uk>
2016-11-21 18:18:47 +00:00
@@ -1155,7 +1156,6 @@ bad_args:
layerscape: add 64b/32b target for ls1043ardb device Add support for NXP layerscape ls1043ardb 64b/32b Dev board. LS1043a is an SoC with 4x64-bit up to 1.6 GHz ARMv8 A53 cores. ls1043ardb support features as: 2GB DDR4, 128MB NOR/512MB NAND, USB3.0, eSDHC, I2C, GPIO, PCIe/Mini-PCIe, 6x1G/1x10G network port, etc. 64b/32b ls1043ardb target is using 4.4 kernel, and rcw/u-boot/fman images from NXP QorIQ SDK release. All of 4.4 kernel patches porting from SDK release or upstream. QorIQ SDK ISOs can be downloaded from this location: http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
2016-10-28 16:14:32 +00:00
}
#ifdef CONFIG_PPC
-#include <asm/mpc85xx.h>
static const u32 a4510_svrs[] __initconst = {
(SVR_P2040 << 8) | 0x10, /* P2040 1.0 */
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -27,9 +27,9 @@
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
+#include <linux/fsl/svr.h>
#include <asm/mpc52xx.h>
-#include <asm/mpc85xx.h>
#include <sysdev/fsl_soc.h>
#define DRV_NAME "mpc-i2c"
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -21,10 +21,10 @@
#include "fsl_pamu.h"
#include <linux/fsl/guts.h>
+#include <linux/fsl/svr.h>
#include <linux/interrupt.h>
#include <linux/genalloc.h>
-#include <asm/mpc85xx.h>
/* define indexes for each operation mapping scenario */
#define OMI_QMAN 0x00
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -86,11 +86,11 @@
#include <linux/udp.h>
#include <linux/in.h>
#include <linux/net_tstamp.h>
+#include <linux/fsl/svr.h>
#include <asm/io.h>
#ifdef CONFIG_PPC
#include <asm/reg.h>
-#include <asm/mpc85xx.h>
#endif
#include <asm/irq.h>
#include <asm/uaccess.h>
--- /dev/null
+++ b/include/linux/fsl/svr.h
@@ -0,0 +1,95 @@
+/*
+ * MPC85xx cpu type detection
+ *
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef FSL_SVR_H
+#define FSL_SVR_H
+
+#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
+#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
+#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
+
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */
+
+#define SVR_8533 0x803400
+#define SVR_8535 0x803701
+#define SVR_8536 0x803700
+#define SVR_8540 0x803000
+#define SVR_8541 0x807200
+#define SVR_8543 0x803200
+#define SVR_8544 0x803401
+#define SVR_8545 0x803102
+#define SVR_8547 0x803101
+#define SVR_8548 0x803100
+#define SVR_8555 0x807100
+#define SVR_8560 0x807000
+#define SVR_8567 0x807501
+#define SVR_8568 0x807500
+#define SVR_8569 0x808000
+#define SVR_8572 0x80E000
+#define SVR_P1010 0x80F100
+#define SVR_P1011 0x80E500
+#define SVR_P1012 0x80E501
+#define SVR_P1013 0x80E700
+#define SVR_P1014 0x80F101
+#define SVR_P1017 0x80F700
+#define SVR_P1020 0x80E400
+#define SVR_P1021 0x80E401
+#define SVR_P1022 0x80E600
+#define SVR_P1023 0x80F600
+#define SVR_P1024 0x80E402
+#define SVR_P1025 0x80E403
+#define SVR_P2010 0x80E300
+#define SVR_P2020 0x80E200
+#define SVR_P2040 0x821000
+#define SVR_P2041 0x821001
+#define SVR_P3041 0x821103
+#define SVR_P4040 0x820100
+#define SVR_P4080 0x820000
+#define SVR_P5010 0x822100
+#define SVR_P5020 0x822000
+#define SVR_P5021 0X820500
+#define SVR_P5040 0x820400
+#define SVR_T4240 0x824000
+#define SVR_T4120 0x824001
+#define SVR_T4160 0x824100
+#define SVR_T4080 0x824102
+#define SVR_C291 0x850000
+#define SVR_C292 0x850020
+#define SVR_C293 0x850030
+#define SVR_B4860 0X868000
+#define SVR_G4860 0x868001
+#define SVR_G4060 0x868003
+#define SVR_B4440 0x868100
+#define SVR_G4440 0x868101
+#define SVR_B4420 0x868102
+#define SVR_B4220 0x868103
+#define SVR_T1040 0x852000
+#define SVR_T1041 0x852001
+#define SVR_T1042 0x852002
+#define SVR_T1020 0x852100
+#define SVR_T1021 0x852101
+#define SVR_T1022 0x852102
+#define SVR_T2080 0x853000
+#define SVR_T2081 0x853100
+
+#define SVR_8610 0x80A000
+#define SVR_8641 0x809000
+#define SVR_8641D 0x809001
+
+#define SVR_9130 0x860001
+#define SVR_9131 0x860000
+#define SVR_9132 0x861000
+#define SVR_9232 0x861400
+
+#define SVR_Unknown 0xFFFFFF
+
+#endif
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