43 lines
1.3 KiB
Diff
43 lines
1.3 KiB
Diff
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From 28a9c5d93113cab73dd3a4b4a74a983151c08b9d Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Fri, 20 Dec 2013 22:41:09 +0100
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Subject: [PATCH] ARM: sun6i: a31: Add support for the High Speed Timers
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The Allwinner A31 has support for four high speed timers. Apart for the
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number of timers (4 vs 2), it's basically the same logic than the high
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speed timers found in the sun5i chips.
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Now that we have a driver to support it, we can enable them in the
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device tree.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun6i-a31.dtsi | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
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index ab6ea43..4b97449 100644
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--- a/arch/arm/boot/dts/sun6i-a31.dtsi
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+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
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@@ -312,6 +312,17 @@
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status = "disabled";
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};
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+ hstimer@01c60000 {
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+ compatible = "allwinner,sun7i-a20-hstimer";
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+ reg = <0x01c60000 0x1000>;
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+ interrupts = <0 51 4>,
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+ <0 52 4>,
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+ <0 53 4>,
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+ <0 54 4>;
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+ clocks = <&ahb1_gates 19>;
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+ resets = <&ahb1_rst 19>;
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+ };
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+
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gic: interrupt-controller@01c81000 {
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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reg = <0x01c81000 0x1000>,
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--
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1.8.5.1
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