32 lines
963 B
Diff
32 lines
963 B
Diff
|
From c61ef9c4707e38edeafad1bd4d01080d0e0a10da Mon Sep 17 00:00:00 2001
|
||
|
|
From: Sean Wang <sean.wang@mediatek.com>
|
||
|
|
Date: Wed, 17 Jan 2018 00:52:27 +0800
|
||
|
|
Subject: [PATCH 222/224] arm64: dts: mt7622: add High-Speed DMA device nodes
|
||
|
|
|
||
|
|
add High-Speed DMA (HSDMA) nodes
|
||
|
|
|
||
|
|
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
|
||
|
|
---
|
||
|
|
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 10 ++++++++++
|
||
|
|
1 file changed, 10 insertions(+)
|
||
|
|
|
||
|
|
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||
|
|
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
||
|
|
@@ -715,6 +715,16 @@
|
||
|
|
#reset-cells = <1>;
|
||
|
|
};
|
||
|
|
|
||
|
|
+ hsdma: dma-controller@1b007000 {
|
||
|
|
+ compatible = "mediatek,mt7622-hsdma";
|
||
|
|
+ reg = <0 0x1b007000 0 0x1000>;
|
||
|
|
+ interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_LOW>;
|
||
|
|
+ clocks = <ðsys CLK_ETH_HSDMA_EN>;
|
||
|
|
+ clock-names = "hsdma";
|
||
|
|
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
|
||
|
|
+ #dma-cells = <1>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
eth: ethernet@1b100000 {
|
||
|
|
compatible = "mediatek,mt7622-eth",
|
||
|
|
"mediatek,mt2701-eth",
|