57 lines
1.8 KiB
Diff
57 lines
1.8 KiB
Diff
|
From 6e081074df96bf3762c2e6438c383f11a56b0a7e Mon Sep 17 00:00:00 2001
|
||
|
|
From: John Crispin <john@phrozen.org>
|
||
|
|
Date: Thu, 10 Aug 2017 15:58:04 +0200
|
||
|
|
Subject: [PATCH 46/57] net: mediatek: add irq delay
|
||
|
|
|
||
|
|
Signed-off-by: John Crispin <john@phrozen.org>
|
||
|
|
---
|
||
|
|
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 ++++++-
|
||
|
|
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++++-
|
||
|
|
2 files changed, 13 insertions(+), 2 deletions(-)
|
||
|
|
|
||
|
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
|
||
|
|
@@ -1904,8 +1904,13 @@ static int mtk_hw_init(struct mtk_eth *e
|
||
|
|
mtk_w32(eth, 0, MTK_CDMP_EG_CTRL);
|
||
|
|
|
||
|
|
/* disable delay and normal interrupt */
|
||
|
|
- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
|
||
|
|
+#ifdef MTK_IRQ_DLY
|
||
|
|
+ mtk_w32(eth, 0x84048404, MTK_PDMA_DELAY_INT);
|
||
|
|
+ mtk_w32(eth, 0x84048404, MTK_QDMA_DELAY_INT);
|
||
|
|
+#else
|
||
|
|
mtk_w32(eth, 0, MTK_PDMA_DELAY_INT);
|
||
|
|
+ mtk_w32(eth, 0, MTK_QDMA_DELAY_INT);
|
||
|
|
+#endif
|
||
|
|
mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0);
|
||
|
|
mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0);
|
||
|
|
mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
|
||
|
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
||
|
|
@@ -12,6 +12,8 @@
|
||
|
|
* Copyright (C) 2013-2016 Michael Lee <igvtee@gmail.com>
|
||
|
|
*/
|
||
|
|
|
||
|
|
+#define MTK_IRQ_DLY
|
||
|
|
+
|
||
|
|
#ifndef MTK_ETH_H
|
||
|
|
#define MTK_ETH_H
|
||
|
|
|
||
|
|
@@ -220,11 +222,15 @@
|
||
|
|
#define MTK_TX_DONE_INT2 BIT(2)
|
||
|
|
#define MTK_TX_DONE_INT1 BIT(1)
|
||
|
|
#define MTK_TX_DONE_INT0 BIT(0)
|
||
|
|
+#ifdef MTK_IRQ_DLY
|
||
|
|
+#define MTK_RX_DONE_INT BIT(30)
|
||
|
|
+#define MTK_TX_DONE_INT BIT(28)
|
||
|
|
+#else
|
||
|
|
#define MTK_RX_DONE_INT (MTK_RX_DONE_INT0 | MTK_RX_DONE_INT1 | \
|
||
|
|
MTK_RX_DONE_INT2 | MTK_RX_DONE_INT3)
|
||
|
|
#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
|
||
|
|
MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
|
||
|
|
-
|
||
|
|
+#endif
|
||
|
|
/* QDMA Interrupt grouping registers */
|
||
|
|
#define MTK_QDMA_INT_GRP1 0x1a20
|
||
|
|
#define MTK_QDMA_INT_GRP2 0x1a24
|