149 lines
5.2 KiB
Diff
149 lines
5.2 KiB
Diff
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 26 Jan 2016 17:57:04 +0100
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Subject: [PATCH] brcmfmac: access PMU registers using standalone PMU core if
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available
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On recent Broadcom chipsets PMU is present as separated core and it
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can't be accessed using ChipCommon anymore as it fails with e.g.:
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[ 18.198412] Unhandled fault: imprecise external abort (0x1406) at 0xb6da200f
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Add a new helper function that will return a proper core that should be
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used for accessing PMU registers.
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
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+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c
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@@ -1014,6 +1014,7 @@ static int brcmf_chip_setup(struct brcmf
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{
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struct brcmf_chip *pub;
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struct brcmf_core_priv *cc;
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+ struct brcmf_core *pmu;
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u32 base;
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u32 val;
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int ret = 0;
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@@ -1030,9 +1031,10 @@ static int brcmf_chip_setup(struct brcmf
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capabilities_ext));
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/* get pmu caps & rev */
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+ pmu = brcmf_chip_get_pmu(pub); /* after reading cc_caps_ext */
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if (pub->cc_caps & CC_CAP_PMU) {
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val = chip->ops->read32(chip->ctx,
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- CORE_CC_REG(base, pmucapabilities));
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+ CORE_CC_REG(pmu->base, pmucapabilities));
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pub->pmurev = val & PCAP_REV_MASK;
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pub->pmucaps = val;
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}
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@@ -1131,6 +1133,23 @@ struct brcmf_core *brcmf_chip_get_chipco
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return &cc->pub;
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}
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+struct brcmf_core *brcmf_chip_get_pmu(struct brcmf_chip *pub)
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+{
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+ struct brcmf_core *cc = brcmf_chip_get_chipcommon(pub);
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+ struct brcmf_core *pmu;
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+
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+ /* See if there is separated PMU core available */
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+ if (cc->rev >= 35 &&
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+ pub->cc_caps_ext & BCMA_CC_CAP_EXT_AOB_PRESENT) {
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+ pmu = brcmf_chip_get_core(pub, BCMA_CORE_PMU);
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+ if (pmu)
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+ return pmu;
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+ }
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+
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+ /* Fallback to ChipCommon core for older hardware */
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+ return cc;
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+}
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+
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bool brcmf_chip_iscoreup(struct brcmf_core *pub)
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{
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struct brcmf_core_priv *core;
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@@ -1301,6 +1320,7 @@ bool brcmf_chip_sr_capable(struct brcmf_
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{
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u32 base, addr, reg, pmu_cc3_mask = ~0;
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struct brcmf_chip_priv *chip;
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+ struct brcmf_core *pmu = brcmf_chip_get_pmu(pub);
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brcmf_dbg(TRACE, "Enter\n");
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@@ -1320,9 +1340,9 @@ bool brcmf_chip_sr_capable(struct brcmf_
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case BRCM_CC_4335_CHIP_ID:
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case BRCM_CC_4339_CHIP_ID:
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/* read PMU chipcontrol register 3 */
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- addr = CORE_CC_REG(base, chipcontrol_addr);
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+ addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
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chip->ops->write32(chip->ctx, addr, 3);
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- addr = CORE_CC_REG(base, chipcontrol_data);
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+ addr = CORE_CC_REG(pmu->base, chipcontrol_data);
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reg = chip->ops->read32(chip->ctx, addr);
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return (reg & pmu_cc3_mask) != 0;
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case BRCM_CC_43430_CHIP_ID:
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@@ -1330,12 +1350,12 @@ bool brcmf_chip_sr_capable(struct brcmf_
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reg = chip->ops->read32(chip->ctx, addr);
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return reg != 0;
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default:
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- addr = CORE_CC_REG(base, pmucapabilities_ext);
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+ addr = CORE_CC_REG(pmu->base, pmucapabilities_ext);
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reg = chip->ops->read32(chip->ctx, addr);
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if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
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return false;
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- addr = CORE_CC_REG(base, retention_ctl);
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+ addr = CORE_CC_REG(pmu->base, retention_ctl);
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reg = chip->ops->read32(chip->ctx, addr);
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return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
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PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
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--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.h
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+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.h
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@@ -85,6 +85,7 @@ struct brcmf_chip *brcmf_chip_attach(voi
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void brcmf_chip_detach(struct brcmf_chip *chip);
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struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid);
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struct brcmf_core *brcmf_chip_get_chipcommon(struct brcmf_chip *chip);
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+struct brcmf_core *brcmf_chip_get_pmu(struct brcmf_chip *pub);
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bool brcmf_chip_iscoreup(struct brcmf_core *core);
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void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
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void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
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--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
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@@ -3615,7 +3615,6 @@ brcmf_sdio_drivestrengthinit(struct brcm
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const struct sdiod_drive_str *str_tab = NULL;
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u32 str_mask;
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u32 str_shift;
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- u32 base;
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u32 i;
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u32 drivestrength_sel = 0;
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u32 cc_data_temp;
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@@ -3658,14 +3657,15 @@ brcmf_sdio_drivestrengthinit(struct brcm
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}
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if (str_tab != NULL) {
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+ struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
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+
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for (i = 0; str_tab[i].strength != 0; i++) {
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if (drivestrength >= str_tab[i].strength) {
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drivestrength_sel = str_tab[i].sel;
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break;
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}
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}
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- base = brcmf_chip_get_chipcommon(ci)->base;
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- addr = CORE_CC_REG(base, chipcontrol_addr);
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+ addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
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brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
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cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
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cc_data_temp &= ~str_mask;
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@@ -3835,8 +3835,7 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
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goto fail;
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/* set PMUControl so a backplane reset does PMU state reload */
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- reg_addr = CORE_CC_REG(brcmf_chip_get_chipcommon(bus->ci)->base,
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- pmucontrol);
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+ reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
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reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err);
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if (err)
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goto fail;
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