2018-08-22 04:20:13 +00:00
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From badf28957b6dc400dff27bd23ba2ae75d9514be5 Mon Sep 17 00:00:00 2001
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2018-05-06 08:20:11 +00:00
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From: John Crispin <john@phrozen.org>
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2018-08-22 04:20:13 +00:00
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Date: Sat, 23 Jun 2018 15:04:09 +0200
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Subject: [PATCH 28/33] MIPS: ath79: drop machfiles
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With the target now being fully OF based, we can drop the legacy mach
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files. Boards can now boot fully of devicetree files.
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2018-05-06 08:20:11 +00:00
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Signed-off-by: John Crispin <john@phrozen.org>
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---
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2018-08-22 04:20:13 +00:00
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arch/mips/Kconfig | 1 -
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2018-05-06 08:20:11 +00:00
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arch/mips/ath79/Kconfig | 73 -------------------
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arch/mips/ath79/Makefile | 10 ---
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2018-08-22 04:20:13 +00:00
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arch/mips/ath79/clock.c | 1 -
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2018-05-06 08:20:11 +00:00
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arch/mips/ath79/mach-ap121.c | 92 ------------------------
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arch/mips/ath79/mach-ap136.c | 156 -----------------------------------------
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arch/mips/ath79/mach-ap81.c | 100 --------------------------
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arch/mips/ath79/mach-db120.c | 136 -----------------------------------
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arch/mips/ath79/mach-pb44.c | 128 ---------------------------------
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arch/mips/ath79/mach-ubnt-xm.c | 126 ---------------------------------
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2018-08-22 04:20:13 +00:00
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arch/mips/ath79/machtypes.h | 28 --------
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arch/mips/ath79/setup.c | 77 +++-----------------
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12 files changed, 9 insertions(+), 919 deletions(-)
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2018-05-06 08:20:11 +00:00
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delete mode 100644 arch/mips/ath79/mach-ap121.c
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delete mode 100644 arch/mips/ath79/mach-ap136.c
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delete mode 100644 arch/mips/ath79/mach-ap81.c
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delete mode 100644 arch/mips/ath79/mach-db120.c
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delete mode 100644 arch/mips/ath79/mach-pb44.c
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delete mode 100644 arch/mips/ath79/mach-ubnt-xm.c
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2018-08-22 04:20:13 +00:00
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delete mode 100644 arch/mips/ath79/machtypes.h
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2018-05-06 08:20:11 +00:00
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2018-08-22 04:20:13 +00:00
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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2018-11-05 10:22:43 +00:00
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@@ -197,7 +197,6 @@ config ATH79
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2018-08-22 04:20:13 +00:00
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select COMMON_CLK
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select CLKDEV_LOOKUP
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select IRQ_MIPS_CPU
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- select MIPS_MACHINE
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_HAS_EARLY_PRINTK
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select SYS_SUPPORTS_32BIT_KERNEL
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2018-05-17 16:41:26 +00:00
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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2018-05-06 08:20:11 +00:00
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@@ -1,79 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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if ATH79
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-menu "Atheros AR71XX/AR724X/AR913X machine selection"
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-
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-config ATH79_MACH_AP121
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- bool "Atheros AP121 reference board"
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- select SOC_AR933X
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- select ATH79_DEV_USB
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- select ATH79_DEV_WMAC
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- help
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- Say 'Y' here if you want your kernel to support the
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- Atheros AP121 reference board.
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-
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-config ATH79_MACH_AP136
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- bool "Atheros AP136 reference board"
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- select SOC_QCA955X
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- select ATH79_DEV_USB
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- select ATH79_DEV_WMAC
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- help
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- Say 'Y' here if you want your kernel to support the
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- Atheros AP136 reference board.
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-
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-config ATH79_MACH_AP81
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- bool "Atheros AP81 reference board"
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- select SOC_AR913X
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- select ATH79_DEV_USB
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- select ATH79_DEV_WMAC
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- help
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- Say 'Y' here if you want your kernel to support the
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- Atheros AP81 reference board.
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-
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-config ATH79_MACH_DB120
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- bool "Atheros DB120 reference board"
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- select SOC_AR934X
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- select ATH79_DEV_USB
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- select ATH79_DEV_WMAC
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- help
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- Say 'Y' here if you want your kernel to support the
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- Atheros DB120 reference board.
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-
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-config ATH79_MACH_PB44
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- bool "Atheros PB44 reference board"
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- select SOC_AR71XX
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- select ATH79_DEV_USB
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- help
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- Say 'Y' here if you want your kernel to support the
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- Atheros PB44 reference board.
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-
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-config ATH79_MACH_UBNT_XM
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- bool "Ubiquiti Networks XM (rev 1.0) board"
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- select SOC_AR724X
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- select ATH79_DEV_GPIO_BUTTONS
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- select ATH79_DEV_LEDS_GPIO
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- select ATH79_DEV_SPI
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- help
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- Say 'Y' here if you want your kernel to support the
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- Ubiquiti Networks XM (rev 1.0) board.
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-
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-endmenu
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-
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config SOC_AR71XX
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select HW_HAS_PCI
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def_bool n
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2018-05-17 16:41:26 +00:00
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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2018-08-22 04:20:13 +00:00
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@@ -22,13 +22,3 @@ obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev
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2018-05-06 08:20:11 +00:00
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obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
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obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
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obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
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-
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-#
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-# Machines
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-#
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-obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
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-obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
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-obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
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-obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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-obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
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-obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
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2018-08-22 04:20:13 +00:00
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--- a/arch/mips/ath79/clock.c
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+++ b/arch/mips/ath79/clock.c
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@@ -26,7 +26,6 @@
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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-#include "machtypes.h"
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#define AR71XX_BASE_FREQ 40000000
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#define AR724X_BASE_FREQ 40000000
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2018-05-17 16:41:26 +00:00
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--- a/arch/mips/ath79/mach-ap121.c
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2018-05-06 08:20:11 +00:00
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+++ /dev/null
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@@ -1,92 +0,0 @@
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-/*
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- * Atheros AP121 board support
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- *
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- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of the GNU General Public License version 2 as published
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- * by the Free Software Foundation.
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- */
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-
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-#include "machtypes.h"
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-#include "dev-gpio-buttons.h"
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-#include "dev-leds-gpio.h"
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-#include "dev-spi.h"
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-#include "dev-usb.h"
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-#include "dev-wmac.h"
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-
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-#define AP121_GPIO_LED_WLAN 0
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-#define AP121_GPIO_LED_USB 1
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-
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-#define AP121_GPIO_BTN_JUMPSTART 11
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-#define AP121_GPIO_BTN_RESET 12
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-
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-#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */
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-#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL)
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-
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-#define AP121_CAL_DATA_ADDR 0x1fff1000
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-
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-static struct gpio_led ap121_leds_gpio[] __initdata = {
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- {
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- .name = "ap121:green:usb",
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- .gpio = AP121_GPIO_LED_USB,
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- .active_low = 0,
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- },
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- {
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- .name = "ap121:green:wlan",
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- .gpio = AP121_GPIO_LED_WLAN,
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- .active_low = 0,
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- },
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-};
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-
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-static struct gpio_keys_button ap121_gpio_keys[] __initdata = {
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- {
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- .desc = "jumpstart button",
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- .type = EV_KEY,
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- .code = KEY_WPS_BUTTON,
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- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
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- .gpio = AP121_GPIO_BTN_JUMPSTART,
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- .active_low = 1,
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- },
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- {
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- .desc = "reset button",
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- .type = EV_KEY,
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- .code = KEY_RESTART,
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- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
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- .gpio = AP121_GPIO_BTN_RESET,
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- .active_low = 1,
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- }
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-};
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-
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-static struct spi_board_info ap121_spi_info[] = {
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- {
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- .bus_num = 0,
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- .chip_select = 0,
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- .max_speed_hz = 25000000,
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- .modalias = "mx25l1606e",
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- }
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-};
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-
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-static struct ath79_spi_platform_data ap121_spi_data = {
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- .bus_num = 0,
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- .num_chipselect = 1,
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-};
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-
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-static void __init ap121_setup(void)
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-{
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- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR);
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-
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- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
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- ap121_leds_gpio);
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- ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
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- ARRAY_SIZE(ap121_gpio_keys),
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- ap121_gpio_keys);
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-
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- ath79_register_spi(&ap121_spi_data, ap121_spi_info,
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- ARRAY_SIZE(ap121_spi_info));
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- ath79_register_usb();
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- ath79_register_wmac(cal_data);
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-}
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-
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-MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board",
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- ap121_setup);
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2018-05-17 16:41:26 +00:00
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--- a/arch/mips/ath79/mach-ap136.c
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2018-05-06 08:20:11 +00:00
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+++ /dev/null
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@@ -1,156 +0,0 @@
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-/*
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- * Qualcomm Atheros AP136 reference board support
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- *
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- * Copyright (c) 2012 Qualcomm Atheros
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- * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
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- *
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- * Permission to use, copy, modify, and/or distribute this software for any
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- * purpose with or without fee is hereby granted, provided that the above
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- * copyright notice and this permission notice appear in all copies.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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- *
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- */
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-
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-#include <linux/pci.h>
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-#include <linux/ath9k_platform.h>
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-
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-#include "machtypes.h"
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-#include "dev-gpio-buttons.h"
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-#include "dev-leds-gpio.h"
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-#include "dev-spi.h"
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-#include "dev-usb.h"
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-#include "dev-wmac.h"
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-#include "pci.h"
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-
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-#define AP136_GPIO_LED_STATUS_RED 14
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-#define AP136_GPIO_LED_STATUS_GREEN 19
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-#define AP136_GPIO_LED_USB 4
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-#define AP136_GPIO_LED_WLAN_2G 13
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-#define AP136_GPIO_LED_WLAN_5G 12
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-#define AP136_GPIO_LED_WPS_RED 15
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-#define AP136_GPIO_LED_WPS_GREEN 20
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-
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-#define AP136_GPIO_BTN_WPS 16
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-#define AP136_GPIO_BTN_RFKILL 21
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-
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-#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
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-#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
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-
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-#define AP136_WMAC_CALDATA_OFFSET 0x1000
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-#define AP136_PCIE_CALDATA_OFFSET 0x5000
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-
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-static struct gpio_led ap136_leds_gpio[] __initdata = {
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- {
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- .name = "qca:green:status",
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- .gpio = AP136_GPIO_LED_STATUS_GREEN,
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- .active_low = 1,
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- },
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- {
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- .name = "qca:red:status",
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- .gpio = AP136_GPIO_LED_STATUS_RED,
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- .active_low = 1,
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- },
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- {
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- .name = "qca:green:wps",
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- .gpio = AP136_GPIO_LED_WPS_GREEN,
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- .active_low = 1,
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- },
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- {
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- .name = "qca:red:wps",
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- .gpio = AP136_GPIO_LED_WPS_RED,
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- .active_low = 1,
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- },
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- {
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- .name = "qca:red:wlan-2g",
|
|
|
|
- .gpio = AP136_GPIO_LED_WLAN_2G,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
- {
|
|
|
|
- .name = "qca:red:usb",
|
|
|
|
- .gpio = AP136_GPIO_LED_USB,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .desc = "WPS button",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_WPS_BUTTON,
|
|
|
|
- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = AP136_GPIO_BTN_WPS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
- {
|
|
|
|
- .desc = "RFKILL button",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_RFKILL,
|
|
|
|
- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = AP136_GPIO_BTN_RFKILL,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct spi_board_info ap136_spi_info[] = {
|
|
|
|
- {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .chip_select = 0,
|
|
|
|
- .max_speed_hz = 25000000,
|
|
|
|
- .modalias = "mx25l6405d",
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct ath79_spi_platform_data ap136_spi_data = {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .num_chipselect = 1,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-#ifdef CONFIG_PCI
|
|
|
|
-static struct ath9k_platform_data ap136_ath9k_data;
|
|
|
|
-
|
|
|
|
-static int ap136_pci_plat_dev_init(struct pci_dev *dev)
|
|
|
|
-{
|
|
|
|
- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
|
|
|
|
- dev->dev.platform_data = &ap136_ath9k_data;
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void __init ap136_pci_init(u8 *eeprom)
|
|
|
|
-{
|
|
|
|
- memcpy(ap136_ath9k_data.eeprom_data, eeprom,
|
|
|
|
- sizeof(ap136_ath9k_data.eeprom_data));
|
|
|
|
-
|
|
|
|
- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
|
|
|
|
- ath79_register_pci();
|
|
|
|
-}
|
|
|
|
-#else
|
|
|
|
-static inline void ap136_pci_init(u8 *eeprom) {}
|
|
|
|
-#endif /* CONFIG_PCI */
|
|
|
|
-
|
|
|
|
-static void __init ap136_setup(void)
|
|
|
|
-{
|
|
|
|
- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
|
|
|
|
-
|
|
|
|
- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
|
|
|
|
- ap136_leds_gpio);
|
|
|
|
- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
|
|
|
|
- ARRAY_SIZE(ap136_gpio_keys),
|
|
|
|
- ap136_gpio_keys);
|
|
|
|
- ath79_register_spi(&ap136_spi_data, ap136_spi_info,
|
|
|
|
- ARRAY_SIZE(ap136_spi_info));
|
|
|
|
- ath79_register_usb();
|
|
|
|
- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
|
|
|
|
- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
|
|
|
|
- "Atheros AP136-010 reference board",
|
|
|
|
- ap136_setup);
|
2018-05-17 16:41:26 +00:00
|
|
|
--- a/arch/mips/ath79/mach-ap81.c
|
2018-05-06 08:20:11 +00:00
|
|
|
+++ /dev/null
|
|
|
|
@@ -1,100 +0,0 @@
|
|
|
|
-/*
|
|
|
|
- * Atheros AP81 board support
|
|
|
|
- *
|
|
|
|
- * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
|
|
|
|
- * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
|
|
|
|
- *
|
|
|
|
- * This program is free software; you can redistribute it and/or modify it
|
|
|
|
- * under the terms of the GNU General Public License version 2 as published
|
|
|
|
- * by the Free Software Foundation.
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
-#include "machtypes.h"
|
|
|
|
-#include "dev-wmac.h"
|
|
|
|
-#include "dev-gpio-buttons.h"
|
|
|
|
-#include "dev-leds-gpio.h"
|
|
|
|
-#include "dev-spi.h"
|
|
|
|
-#include "dev-usb.h"
|
|
|
|
-
|
|
|
|
-#define AP81_GPIO_LED_STATUS 1
|
|
|
|
-#define AP81_GPIO_LED_AOSS 3
|
|
|
|
-#define AP81_GPIO_LED_WLAN 6
|
|
|
|
-#define AP81_GPIO_LED_POWER 14
|
|
|
|
-
|
|
|
|
-#define AP81_GPIO_BTN_SW4 12
|
|
|
|
-#define AP81_GPIO_BTN_SW1 21
|
|
|
|
-
|
|
|
|
-#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */
|
|
|
|
-#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL)
|
|
|
|
-
|
|
|
|
-#define AP81_CAL_DATA_ADDR 0x1fff1000
|
|
|
|
-
|
|
|
|
-static struct gpio_led ap81_leds_gpio[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .name = "ap81:green:status",
|
|
|
|
- .gpio = AP81_GPIO_LED_STATUS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }, {
|
|
|
|
- .name = "ap81:amber:aoss",
|
|
|
|
- .gpio = AP81_GPIO_LED_AOSS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }, {
|
|
|
|
- .name = "ap81:green:wlan",
|
|
|
|
- .gpio = AP81_GPIO_LED_WLAN,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }, {
|
|
|
|
- .name = "ap81:green:power",
|
|
|
|
- .gpio = AP81_GPIO_LED_POWER,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .desc = "sw1",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = BTN_0,
|
|
|
|
- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = AP81_GPIO_BTN_SW1,
|
|
|
|
- .active_low = 1,
|
|
|
|
- } , {
|
|
|
|
- .desc = "sw4",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = BTN_1,
|
|
|
|
- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = AP81_GPIO_BTN_SW4,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct spi_board_info ap81_spi_info[] = {
|
|
|
|
- {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .chip_select = 0,
|
|
|
|
- .max_speed_hz = 25000000,
|
|
|
|
- .modalias = "m25p64",
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct ath79_spi_platform_data ap81_spi_data = {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .num_chipselect = 1,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static void __init ap81_setup(void)
|
|
|
|
-{
|
|
|
|
- u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
|
|
|
|
-
|
|
|
|
- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
|
|
|
|
- ap81_leds_gpio);
|
|
|
|
- ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
|
|
|
|
- ARRAY_SIZE(ap81_gpio_keys),
|
|
|
|
- ap81_gpio_keys);
|
|
|
|
- ath79_register_spi(&ap81_spi_data, ap81_spi_info,
|
|
|
|
- ARRAY_SIZE(ap81_spi_info));
|
|
|
|
- ath79_register_wmac(cal_data);
|
|
|
|
- ath79_register_usb();
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
|
|
|
|
- ap81_setup);
|
2018-05-17 16:41:26 +00:00
|
|
|
--- a/arch/mips/ath79/mach-db120.c
|
2018-05-06 08:20:11 +00:00
|
|
|
+++ /dev/null
|
|
|
|
@@ -1,136 +0,0 @@
|
|
|
|
-/*
|
|
|
|
- * Atheros DB120 reference board support
|
|
|
|
- *
|
|
|
|
- * Copyright (c) 2011 Qualcomm Atheros
|
|
|
|
- * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
|
|
|
- *
|
|
|
|
- * Permission to use, copy, modify, and/or distribute this software for any
|
|
|
|
- * purpose with or without fee is hereby granted, provided that the above
|
|
|
|
- * copyright notice and this permission notice appear in all copies.
|
|
|
|
- *
|
|
|
|
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
|
|
|
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
|
|
|
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
|
|
|
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
|
|
|
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
|
|
|
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
|
|
|
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
|
|
|
- *
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
-#include <linux/pci.h>
|
|
|
|
-#include <linux/ath9k_platform.h>
|
|
|
|
-
|
|
|
|
-#include "machtypes.h"
|
|
|
|
-#include "dev-gpio-buttons.h"
|
|
|
|
-#include "dev-leds-gpio.h"
|
|
|
|
-#include "dev-spi.h"
|
|
|
|
-#include "dev-usb.h"
|
|
|
|
-#include "dev-wmac.h"
|
|
|
|
-#include "pci.h"
|
|
|
|
-
|
|
|
|
-#define DB120_GPIO_LED_WLAN_5G 12
|
|
|
|
-#define DB120_GPIO_LED_WLAN_2G 13
|
|
|
|
-#define DB120_GPIO_LED_STATUS 14
|
|
|
|
-#define DB120_GPIO_LED_WPS 15
|
|
|
|
-
|
|
|
|
-#define DB120_GPIO_BTN_WPS 16
|
|
|
|
-
|
|
|
|
-#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
|
|
|
|
-#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
|
|
|
|
-
|
|
|
|
-#define DB120_WMAC_CALDATA_OFFSET 0x1000
|
|
|
|
-#define DB120_PCIE_CALDATA_OFFSET 0x5000
|
|
|
|
-
|
|
|
|
-static struct gpio_led db120_leds_gpio[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .name = "db120:green:status",
|
|
|
|
- .gpio = DB120_GPIO_LED_STATUS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
- {
|
|
|
|
- .name = "db120:green:wps",
|
|
|
|
- .gpio = DB120_GPIO_LED_WPS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
- {
|
|
|
|
- .name = "db120:green:wlan-5g",
|
|
|
|
- .gpio = DB120_GPIO_LED_WLAN_5G,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
- {
|
|
|
|
- .name = "db120:green:wlan-2g",
|
|
|
|
- .gpio = DB120_GPIO_LED_WLAN_2G,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_keys_button db120_gpio_keys[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .desc = "WPS button",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_WPS_BUTTON,
|
|
|
|
- .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = DB120_GPIO_BTN_WPS,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct spi_board_info db120_spi_info[] = {
|
|
|
|
- {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .chip_select = 0,
|
|
|
|
- .max_speed_hz = 25000000,
|
|
|
|
- .modalias = "s25sl064a",
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct ath79_spi_platform_data db120_spi_data = {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .num_chipselect = 1,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-#ifdef CONFIG_PCI
|
|
|
|
-static struct ath9k_platform_data db120_ath9k_data;
|
|
|
|
-
|
|
|
|
-static int db120_pci_plat_dev_init(struct pci_dev *dev)
|
|
|
|
-{
|
|
|
|
- switch (PCI_SLOT(dev->devfn)) {
|
|
|
|
- case 0:
|
|
|
|
- dev->dev.platform_data = &db120_ath9k_data;
|
|
|
|
- break;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void __init db120_pci_init(u8 *eeprom)
|
|
|
|
-{
|
|
|
|
- memcpy(db120_ath9k_data.eeprom_data, eeprom,
|
|
|
|
- sizeof(db120_ath9k_data.eeprom_data));
|
|
|
|
-
|
|
|
|
- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
|
|
|
|
- ath79_register_pci();
|
|
|
|
-}
|
|
|
|
-#else
|
|
|
|
-static inline void db120_pci_init(u8 *eeprom) {}
|
|
|
|
-#endif /* CONFIG_PCI */
|
|
|
|
-
|
|
|
|
-static void __init db120_setup(void)
|
|
|
|
-{
|
|
|
|
- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
|
|
|
|
-
|
|
|
|
- ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
|
|
|
|
- db120_leds_gpio);
|
|
|
|
- ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
|
|
|
|
- ARRAY_SIZE(db120_gpio_keys),
|
|
|
|
- db120_gpio_keys);
|
|
|
|
- ath79_register_spi(&db120_spi_data, db120_spi_info,
|
|
|
|
- ARRAY_SIZE(db120_spi_info));
|
|
|
|
- ath79_register_usb();
|
|
|
|
- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
|
|
|
|
- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
|
|
|
|
- db120_setup);
|
2018-05-17 16:41:26 +00:00
|
|
|
--- a/arch/mips/ath79/mach-pb44.c
|
2018-05-06 08:20:11 +00:00
|
|
|
+++ /dev/null
|
|
|
|
@@ -1,122 +0,0 @@
|
|
|
|
-/*
|
|
|
|
- * Atheros PB44 reference board support
|
|
|
|
- *
|
|
|
|
- * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
|
|
|
|
- *
|
|
|
|
- * This program is free software; you can redistribute it and/or modify it
|
|
|
|
- * under the terms of the GNU General Public License version 2 as published
|
|
|
|
- * by the Free Software Foundation.
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
-#include <linux/init.h>
|
|
|
|
-#include <linux/platform_device.h>
|
|
|
|
-#include <linux/i2c.h>
|
|
|
|
-#include <linux/i2c-gpio.h>
|
|
|
|
-#include <linux/platform_data/pcf857x.h>
|
|
|
|
-
|
|
|
|
-#include "machtypes.h"
|
|
|
|
-#include "dev-gpio-buttons.h"
|
|
|
|
-#include "dev-leds-gpio.h"
|
|
|
|
-#include "dev-spi.h"
|
|
|
|
-#include "dev-usb.h"
|
|
|
|
-#include "pci.h"
|
|
|
|
-
|
|
|
|
-#define PB44_GPIO_I2C_SCL 0
|
|
|
|
-#define PB44_GPIO_I2C_SDA 1
|
|
|
|
-
|
|
|
|
-#define PB44_GPIO_EXP_BASE 16
|
|
|
|
-#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6)
|
|
|
|
-#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8)
|
|
|
|
-#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9)
|
|
|
|
-#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10)
|
|
|
|
-
|
|
|
|
-#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */
|
|
|
|
-#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
|
|
|
|
-
|
|
|
|
-static struct i2c_gpio_platform_data pb44_i2c_gpio_data = {
|
|
|
|
- .sda_pin = PB44_GPIO_I2C_SDA,
|
|
|
|
- .scl_pin = PB44_GPIO_I2C_SCL,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct platform_device pb44_i2c_gpio_device = {
|
|
|
|
- .name = "i2c-gpio",
|
|
|
|
- .id = 0,
|
|
|
|
- .dev = {
|
|
|
|
- .platform_data = &pb44_i2c_gpio_data,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct pcf857x_platform_data pb44_pcf857x_data = {
|
|
|
|
- .gpio_base = PB44_GPIO_EXP_BASE,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct i2c_board_info pb44_i2c_board_info[] __initdata = {
|
|
|
|
- {
|
|
|
|
- I2C_BOARD_INFO("pcf8575", 0x20),
|
|
|
|
- .platform_data = &pb44_pcf857x_data,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_led pb44_leds_gpio[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .name = "pb44:amber:jump1",
|
|
|
|
- .gpio = PB44_GPIO_LED_JUMP1,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }, {
|
|
|
|
- .name = "pb44:green:jump2",
|
|
|
|
- .gpio = PB44_GPIO_LED_JUMP2,
|
|
|
|
- .active_low = 1,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .desc = "soft_reset",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_RESTART,
|
|
|
|
- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = PB44_GPIO_SW_RESET,
|
|
|
|
- .active_low = 1,
|
|
|
|
- } , {
|
|
|
|
- .desc = "jumpstart",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_WPS_BUTTON,
|
|
|
|
- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = PB44_GPIO_SW_JUMP,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct spi_board_info pb44_spi_info[] = {
|
|
|
|
- {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .chip_select = 0,
|
|
|
|
- .max_speed_hz = 25000000,
|
|
|
|
- .modalias = "m25p64",
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct ath79_spi_platform_data pb44_spi_data = {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .num_chipselect = 1,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static void __init pb44_init(void)
|
|
|
|
-{
|
|
|
|
- i2c_register_board_info(0, pb44_i2c_board_info,
|
|
|
|
- ARRAY_SIZE(pb44_i2c_board_info));
|
|
|
|
- platform_device_register(&pb44_i2c_gpio_device);
|
|
|
|
-
|
|
|
|
- ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio),
|
|
|
|
- pb44_leds_gpio);
|
|
|
|
- ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
|
|
|
|
- ARRAY_SIZE(pb44_gpio_keys),
|
|
|
|
- pb44_gpio_keys);
|
|
|
|
- ath79_register_spi(&pb44_spi_data, pb44_spi_info,
|
|
|
|
- ARRAY_SIZE(pb44_spi_info));
|
|
|
|
- ath79_register_usb();
|
|
|
|
- ath79_register_pci();
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
|
|
|
|
- pb44_init);
|
2018-08-22 04:20:13 +00:00
|
|
|
--- a/arch/mips/ath79/mach-ubnt-xm.c
|
|
|
|
+++ /dev/null
|
|
|
|
@@ -1,126 +0,0 @@
|
|
|
|
-/*
|
|
|
|
- * Ubiquiti Networks XM (rev 1.0) board support
|
|
|
|
- *
|
|
|
|
- * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
|
|
|
|
- *
|
|
|
|
- * Derived from: mach-pb44.c
|
|
|
|
- *
|
|
|
|
- * This program is free software; you can redistribute it and/or modify it
|
|
|
|
- * under the terms of the GNU General Public License version 2 as published
|
|
|
|
- * by the Free Software Foundation.
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
-#include <linux/init.h>
|
|
|
|
-#include <linux/pci.h>
|
|
|
|
-#include <linux/ath9k_platform.h>
|
|
|
|
-
|
|
|
|
-#include <asm/mach-ath79/irq.h>
|
|
|
|
-
|
|
|
|
-#include "machtypes.h"
|
|
|
|
-#include "dev-gpio-buttons.h"
|
|
|
|
-#include "dev-leds-gpio.h"
|
|
|
|
-#include "dev-spi.h"
|
|
|
|
-#include "pci.h"
|
|
|
|
-
|
|
|
|
-#define UBNT_XM_GPIO_LED_L1 0
|
|
|
|
-#define UBNT_XM_GPIO_LED_L2 1
|
|
|
|
-#define UBNT_XM_GPIO_LED_L3 11
|
|
|
|
-#define UBNT_XM_GPIO_LED_L4 7
|
|
|
|
-
|
|
|
|
-#define UBNT_XM_GPIO_BTN_RESET 12
|
|
|
|
-
|
|
|
|
-#define UBNT_XM_KEYS_POLL_INTERVAL 20
|
|
|
|
-#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL)
|
|
|
|
-
|
|
|
|
-#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000)
|
|
|
|
-
|
|
|
|
-static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .name = "ubnt-xm:red:link1",
|
|
|
|
- .gpio = UBNT_XM_GPIO_LED_L1,
|
|
|
|
- .active_low = 0,
|
|
|
|
- }, {
|
|
|
|
- .name = "ubnt-xm:orange:link2",
|
|
|
|
- .gpio = UBNT_XM_GPIO_LED_L2,
|
|
|
|
- .active_low = 0,
|
|
|
|
- }, {
|
|
|
|
- .name = "ubnt-xm:green:link3",
|
|
|
|
- .gpio = UBNT_XM_GPIO_LED_L3,
|
|
|
|
- .active_low = 0,
|
|
|
|
- }, {
|
|
|
|
- .name = "ubnt-xm:green:link4",
|
|
|
|
- .gpio = UBNT_XM_GPIO_LED_L4,
|
|
|
|
- .active_low = 0,
|
|
|
|
- },
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = {
|
|
|
|
- {
|
|
|
|
- .desc = "reset",
|
|
|
|
- .type = EV_KEY,
|
|
|
|
- .code = KEY_RESTART,
|
|
|
|
- .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL,
|
|
|
|
- .gpio = UBNT_XM_GPIO_BTN_RESET,
|
|
|
|
- .active_low = 1,
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct spi_board_info ubnt_xm_spi_info[] = {
|
|
|
|
- {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .chip_select = 0,
|
|
|
|
- .max_speed_hz = 25000000,
|
|
|
|
- .modalias = "mx25l6405d",
|
|
|
|
- }
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-static struct ath79_spi_platform_data ubnt_xm_spi_data = {
|
|
|
|
- .bus_num = 0,
|
|
|
|
- .num_chipselect = 1,
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-#ifdef CONFIG_PCI
|
|
|
|
-static struct ath9k_platform_data ubnt_xm_eeprom_data;
|
|
|
|
-
|
|
|
|
-static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev)
|
|
|
|
-{
|
|
|
|
- switch (PCI_SLOT(dev->devfn)) {
|
|
|
|
- case 0:
|
|
|
|
- dev->dev.platform_data = &ubnt_xm_eeprom_data;
|
|
|
|
- break;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-static void __init ubnt_xm_pci_init(void)
|
|
|
|
-{
|
|
|
|
- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR,
|
|
|
|
- sizeof(ubnt_xm_eeprom_data.eeprom_data));
|
|
|
|
-
|
|
|
|
- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init);
|
|
|
|
- ath79_register_pci();
|
|
|
|
-}
|
|
|
|
-#else
|
|
|
|
-static inline void ubnt_xm_pci_init(void) {}
|
|
|
|
-#endif /* CONFIG_PCI */
|
|
|
|
-
|
|
|
|
-static void __init ubnt_xm_init(void)
|
|
|
|
-{
|
|
|
|
- ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio),
|
|
|
|
- ubnt_xm_leds_gpio);
|
|
|
|
-
|
|
|
|
- ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
|
|
|
|
- ARRAY_SIZE(ubnt_xm_gpio_keys),
|
|
|
|
- ubnt_xm_gpio_keys);
|
|
|
|
-
|
|
|
|
- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info,
|
|
|
|
- ARRAY_SIZE(ubnt_xm_spi_info));
|
|
|
|
-
|
|
|
|
- ubnt_xm_pci_init();
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_UBNT_XM,
|
|
|
|
- "UBNT-XM",
|
|
|
|
- "Ubiquiti Networks XM (rev 1.0) board",
|
|
|
|
- ubnt_xm_init);
|
|
|
|
--- a/arch/mips/ath79/machtypes.h
|
|
|
|
+++ /dev/null
|
|
|
|
@@ -1,28 +0,0 @@
|
|
|
|
-/*
|
|
|
|
- * Atheros AR71XX/AR724X/AR913X machine type definitions
|
|
|
|
- *
|
|
|
|
- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
|
|
|
|
- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
|
|
|
|
- *
|
|
|
|
- * This program is free software; you can redistribute it and/or modify it
|
|
|
|
- * under the terms of the GNU General Public License version 2 as published
|
|
|
|
- * by the Free Software Foundation.
|
|
|
|
- */
|
|
|
|
-
|
|
|
|
-#ifndef _ATH79_MACHTYPE_H
|
|
|
|
-#define _ATH79_MACHTYPE_H
|
|
|
|
-
|
|
|
|
-#include <asm/mips_machine.h>
|
|
|
|
-
|
|
|
|
-enum ath79_mach_type {
|
|
|
|
- ATH79_MACH_GENERIC_OF = -1, /* Device tree board */
|
|
|
|
- ATH79_MACH_GENERIC = 0,
|
|
|
|
- ATH79_MACH_AP121, /* Atheros AP121 reference board */
|
|
|
|
- ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
|
|
|
|
- ATH79_MACH_AP81, /* Atheros AP81 reference board */
|
|
|
|
- ATH79_MACH_DB120, /* Atheros DB120 reference board */
|
|
|
|
- ATH79_MACH_PB44, /* Atheros PB44 reference board */
|
|
|
|
- ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
|
|
|
|
-};
|
|
|
|
-
|
|
|
|
-#endif /* _ATH79_MACHTYPE_H */
|
|
|
|
--- a/arch/mips/ath79/setup.c
|
|
|
|
+++ b/arch/mips/ath79/setup.c
|
|
|
|
@@ -33,7 +33,6 @@
|
|
|
|
#include <asm/mach-ath79/ar71xx_regs.h>
|
|
|
|
#include "common.h"
|
|
|
|
#include "dev-common.h"
|
|
|
|
-#include "machtypes.h"
|
|
|
|
|
|
|
|
#define ATH79_SYS_TYPE_LEN 64
|
|
|
|
|
|
|
|
@@ -236,25 +235,21 @@ void __init plat_mem_setup(void)
|
|
|
|
else if (fw_passed_dtb)
|
|
|
|
__dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
|
|
|
|
|
|
|
|
- if (mips_machtype != ATH79_MACH_GENERIC_OF) {
|
|
|
|
- ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
|
|
|
|
- AR71XX_RESET_SIZE);
|
|
|
|
- ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
|
|
|
|
- AR71XX_PLL_SIZE);
|
|
|
|
- ath79_detect_sys_type();
|
|
|
|
- ath79_ddr_ctrl_init();
|
|
|
|
+ ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
|
|
|
|
+ AR71XX_RESET_SIZE);
|
|
|
|
+ ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
|
|
|
|
+ AR71XX_PLL_SIZE);
|
|
|
|
+ ath79_detect_sys_type();
|
|
|
|
+ ath79_ddr_ctrl_init();
|
|
|
|
|
|
|
|
- detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
|
|
|
|
-
|
|
|
|
- /* OF machines should use the reset driver */
|
|
|
|
- _machine_restart = ath79_restart;
|
|
|
|
- }
|
|
|
|
+ detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX);
|
|
|
|
|
|
|
|
+ _machine_restart = ath79_restart;
|
|
|
|
_machine_halt = ath79_halt;
|
|
|
|
pm_power_off = ath79_halt;
|
|
|
|
}
|
|
|
|
|
|
|
|
-static void __init ath79_of_plat_time_init(void)
|
|
|
|
+void __init plat_time_init(void)
|
|
|
|
{
|
|
|
|
struct device_node *np;
|
|
|
|
struct clk *clk;
|
|
|
|
@@ -284,66 +279,12 @@ static void __init ath79_of_plat_time_in
|
|
|
|
clk_put(clk);
|
|
|
|
}
|
|
|
|
|
|
|
|
-void __init plat_time_init(void)
|
|
|
|
-{
|
|
|
|
- unsigned long cpu_clk_rate;
|
|
|
|
- unsigned long ahb_clk_rate;
|
|
|
|
- unsigned long ddr_clk_rate;
|
|
|
|
- unsigned long ref_clk_rate;
|
|
|
|
-
|
|
|
|
- if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) {
|
|
|
|
- ath79_of_plat_time_init();
|
|
|
|
- return;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- ath79_clocks_init();
|
|
|
|
-
|
|
|
|
- cpu_clk_rate = ath79_get_sys_clk_rate("cpu");
|
|
|
|
- ahb_clk_rate = ath79_get_sys_clk_rate("ahb");
|
|
|
|
- ddr_clk_rate = ath79_get_sys_clk_rate("ddr");
|
|
|
|
- ref_clk_rate = ath79_get_sys_clk_rate("ref");
|
|
|
|
-
|
|
|
|
- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n",
|
|
|
|
- cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000,
|
|
|
|
- ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000,
|
|
|
|
- ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000,
|
|
|
|
- ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000);
|
|
|
|
-
|
|
|
|
- mips_hpt_frequency = cpu_clk_rate / 2;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
void __init arch_init_irq(void)
|
|
|
|
{
|
|
|
|
irqchip_init();
|
|
|
|
}
|
|
|
|
|
|
|
|
-static int __init ath79_setup(void)
|
|
|
|
-{
|
|
|
|
- if (mips_machtype == ATH79_MACH_GENERIC_OF)
|
|
|
|
- return 0;
|
|
|
|
-
|
|
|
|
- ath79_gpio_init();
|
|
|
|
- ath79_register_uart();
|
|
|
|
- ath79_register_wdt();
|
|
|
|
-
|
|
|
|
- mips_machine_setup();
|
|
|
|
-
|
|
|
|
- return 0;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-arch_initcall(ath79_setup);
|
|
|
|
-
|
|
|
|
void __init device_tree_init(void)
|
|
|
|
{
|
|
|
|
unflatten_and_copy_device_tree();
|
|
|
|
}
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_GENERIC,
|
|
|
|
- "Generic",
|
|
|
|
- "Generic AR71XX/AR724X/AR913X based board",
|
|
|
|
- NULL);
|
|
|
|
-
|
|
|
|
-MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
|
|
|
|
- "DTB",
|
|
|
|
- "Generic AR71XX/AR724X/AR913X based board (DT)",
|
|
|
|
- NULL);
|