lantiq: add support for the Alpha ASL56026
The ASL56026 is a VDSL2 router with dual 100mbit ethernet,
also known as the ECI B-FOCuS V-2FUb/I.
CPU: Lantiq XRX268 v1.1 at 333MHz
Modem: Lantiq VRX208
RAM: 32MiB DDR2 at 167MHz
Flash: 8MiB NOR, Spansion S29GL064N90TF04
UART is at JP1:
Pin 1 TX
Pin 2 GND
Pin 3 +3.3V
Pin 4 NC
Pin 5 RX
Boot selection pins are exposed via several resistor jumpers:
boot_sel0 is at J15, on the rear of the board. Default is high.
boot_sel1 is at J3, next to the flash - it is also the flash CE# pin. Default is low.
boot_sel2 is at J12, directly below the SoC. Default is low.
boot_sel3 is at J16, on the rear of the board. Default is low.
The boot_sel pins should never be shorted, the jumper must be moved or
a lower value resistor used to change the pull (existing resistors are 4k7, 1k should work)
To install with the stock bootloader you must break the built in image selection process
which uses at least the following vars: f_upgrade_addr, f_upgrade2_addr, loadaddr, kernel_addr, activeregion, committedregion
This is done by setting loadaddr and both f_upgrade_addr vars to the same address:
VR9 # setenv loadaddr 0xB0040000
VR9 # setenv f_upgrade_addr 0xB0040000
VR9 # setenv f_upgrade2_addr 0xB0040000
VR9 # saveenv
Then flash the firmware image:
VR9 # tftpboot 0x81000000 lede-lantiq-xrx200-ASL56026-squashfs-sysupgrade.bin
VR9 # erase B0040000 +${filesize}
VR9 # cp.b 0x81000000 0xB0040000 ${filesize}
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2017-03-06 23:25:37 +00:00
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/dts-v1/;
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#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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2017-04-08 08:33:53 +00:00
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compatible = "alphanetworks,asl56026", "lantiq,xway", "lantiq,vr9";
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2017-04-08 09:40:07 +00:00
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model = "BT OpenReach VDSL Modem";
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lantiq: add support for the Alpha ASL56026
The ASL56026 is a VDSL2 router with dual 100mbit ethernet,
also known as the ECI B-FOCuS V-2FUb/I.
CPU: Lantiq XRX268 v1.1 at 333MHz
Modem: Lantiq VRX208
RAM: 32MiB DDR2 at 167MHz
Flash: 8MiB NOR, Spansion S29GL064N90TF04
UART is at JP1:
Pin 1 TX
Pin 2 GND
Pin 3 +3.3V
Pin 4 NC
Pin 5 RX
Boot selection pins are exposed via several resistor jumpers:
boot_sel0 is at J15, on the rear of the board. Default is high.
boot_sel1 is at J3, next to the flash - it is also the flash CE# pin. Default is low.
boot_sel2 is at J12, directly below the SoC. Default is low.
boot_sel3 is at J16, on the rear of the board. Default is low.
The boot_sel pins should never be shorted, the jumper must be moved or
a lower value resistor used to change the pull (existing resistors are 4k7, 1k should work)
To install with the stock bootloader you must break the built in image selection process
which uses at least the following vars: f_upgrade_addr, f_upgrade2_addr, loadaddr, kernel_addr, activeregion, committedregion
This is done by setting loadaddr and both f_upgrade_addr vars to the same address:
VR9 # setenv loadaddr 0xB0040000
VR9 # setenv f_upgrade_addr 0xB0040000
VR9 # setenv f_upgrade2_addr 0xB0040000
VR9 # saveenv
Then flash the firmware image:
VR9 # tftpboot 0x81000000 lede-lantiq-xrx200-ASL56026-squashfs-sysupgrade.bin
VR9 # erase B0040000 +${filesize}
VR9 # cp.b 0x81000000 0xB0040000 ${filesize}
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2017-03-06 23:25:37 +00:00
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chosen {
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bootargs = "console=ttyLTQ0,115200";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_red;
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led-running = &power_green;
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2017-06-14 18:17:16 +00:00
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led-dsl = &dsl;
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lantiq: add support for the Alpha ASL56026
The ASL56026 is a VDSL2 router with dual 100mbit ethernet,
also known as the ECI B-FOCuS V-2FUb/I.
CPU: Lantiq XRX268 v1.1 at 333MHz
Modem: Lantiq VRX208
RAM: 32MiB DDR2 at 167MHz
Flash: 8MiB NOR, Spansion S29GL064N90TF04
UART is at JP1:
Pin 1 TX
Pin 2 GND
Pin 3 +3.3V
Pin 4 NC
Pin 5 RX
Boot selection pins are exposed via several resistor jumpers:
boot_sel0 is at J15, on the rear of the board. Default is high.
boot_sel1 is at J3, next to the flash - it is also the flash CE# pin. Default is low.
boot_sel2 is at J12, directly below the SoC. Default is low.
boot_sel3 is at J16, on the rear of the board. Default is low.
The boot_sel pins should never be shorted, the jumper must be moved or
a lower value resistor used to change the pull (existing resistors are 4k7, 1k should work)
To install with the stock bootloader you must break the built in image selection process
which uses at least the following vars: f_upgrade_addr, f_upgrade2_addr, loadaddr, kernel_addr, activeregion, committedregion
This is done by setting loadaddr and both f_upgrade_addr vars to the same address:
VR9 # setenv loadaddr 0xB0040000
VR9 # setenv f_upgrade_addr 0xB0040000
VR9 # setenv f_upgrade2_addr 0xB0040000
VR9 # saveenv
Then flash the firmware image:
VR9 # tftpboot 0x81000000 lede-lantiq-xrx200-ASL56026-squashfs-sysupgrade.bin
VR9 # erase B0040000 +${filesize}
VR9 # cp.b 0x81000000 0xB0040000 ${filesize}
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2017-03-06 23:25:37 +00:00
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};
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memory@0 {
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reg = <0x0 0x2000000>;
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};
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fpi@10000000 {
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localbus@0 {
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nor-boot@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x0800000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x30000>;
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};
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partition@30000 {
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label = "uboot_env";
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reg = <0x30000 0x10000>;
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};
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partition@40000 {
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label = "firmware";
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reg = <0x40000 0x750000>;
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};
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partition@790000 {
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label = "ddrconfig";
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reg = <0x790000 0x70000>;
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read-only;
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};
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};
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};
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};
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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};
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};
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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2017-12-31 10:48:15 +00:00
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firmware1 = "lantiq/xrx200_phy22f_a14.bin"; /*VR9 1.1*/
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firmware2 = "lantiq/xrx200_phy22f_a22.bin"; /*VR9 1.2*/
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lantiq: add support for the Alpha ASL56026
The ASL56026 is a VDSL2 router with dual 100mbit ethernet,
also known as the ECI B-FOCuS V-2FUb/I.
CPU: Lantiq XRX268 v1.1 at 333MHz
Modem: Lantiq VRX208
RAM: 32MiB DDR2 at 167MHz
Flash: 8MiB NOR, Spansion S29GL064N90TF04
UART is at JP1:
Pin 1 TX
Pin 2 GND
Pin 3 +3.3V
Pin 4 NC
Pin 5 RX
Boot selection pins are exposed via several resistor jumpers:
boot_sel0 is at J15, on the rear of the board. Default is high.
boot_sel1 is at J3, next to the flash - it is also the flash CE# pin. Default is low.
boot_sel2 is at J12, directly below the SoC. Default is low.
boot_sel3 is at J16, on the rear of the board. Default is low.
The boot_sel pins should never be shorted, the jumper must be moved or
a lower value resistor used to change the pull (existing resistors are 4k7, 1k should work)
To install with the stock bootloader you must break the built in image selection process
which uses at least the following vars: f_upgrade_addr, f_upgrade2_addr, loadaddr, kernel_addr, activeregion, committedregion
This is done by setting loadaddr and both f_upgrade_addr vars to the same address:
VR9 # setenv loadaddr 0xB0040000
VR9 # setenv f_upgrade_addr 0xB0040000
VR9 # setenv f_upgrade2_addr 0xB0040000
VR9 # saveenv
Then flash the firmware image:
VR9 # tftpboot 0x81000000 lede-lantiq-xrx200-ASL56026-squashfs-sysupgrade.bin
VR9 # erase B0040000 +${filesize}
VR9 # cp.b 0x81000000 0xB0040000 ${filesize}
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
2017-03-06 23:25:37 +00:00
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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dsl: dsl {
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label = "asl56026:green:dsl";
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gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
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};
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/* power-* is a bicolour led */
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power_green: power_green {
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label = "asl56026:green:power";
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gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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default-state = "keep";
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};
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power_red: power_red {
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label = "asl56026:red:power";
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gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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power_led_blink {
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gpio-export,name = "power_led_blink";
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gpio-export,output = <0>;
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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lantiq,switch;
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "mii";
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phy-handle = <&phy11>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <3>;
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phy-mode = "mii";
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phy-handle = <&phy14>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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phy14: ethernet-phy@14 {
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reg = <0x14>;
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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