openwrtv3/target/linux/sunxi/patches-3.13/193-stmmac-platform-ext-for-a20.patch

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From 3c6560eccfeee3a93d57c3b2206abfbe06459015 Mon Sep 17 00:00:00 2001
From: Chen-Yu Tsai <wens@csie.org>
Date: Sat, 7 Dec 2013 01:29:37 +0800
Subject: [PATCH] net: stmmac: sunxi platfrom extensions for GMAC in Allwinner
A20 SoC's
The Allwinner A20 has an ethernet controller that seems to be
an early version of Synopsys DesignWare MAC 10/100/1000 Universal,
which is supported by the stmmac driver.
Allwinner's GMAC requires setting additional registers in the SoC's
clock control unit.
The exact version of the DWMAC IP that Allwinner uses is unknown,
thus the exact feature set is unknown.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../bindings/net/allwinner,sun7i-gmac.txt | 22 +++++++
drivers/net/ethernet/stmicro/stmmac/Kconfig | 12 ++++
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c | 76 ++++++++++++++++++++++
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 +
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +
6 files changed, 117 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-gmac.txt
@@ -0,0 +1,22 @@
+* Allwinner GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+ - compatible: Should be "allwinner,sun7i-gmac"
+ - reg: Address and length of register set for the device and corresponding
+ clock control
+
+Examples:
+
+ gmac: ethernet@01c50000 {
+ compatible = "allwinner,sun7i-gmac";
+ reg = <0x01c50000 0x10000>,
+ <0x01c20164 0x4>;
+ interrupts = <0 85 1>;
+ interrupt-names = "macirq";
+ clocks = <&ahb_gates 49>;
+ clock-names = "stmmaceth";
+ phy-mode = "mii";
+ };
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -25,6 +25,18 @@ config STMMAC_PLATFORM
If unsure, say N.
+config DWMAC_SUNXI
+ bool "Allwinner GMAC support"
+ depends on STMMAC_PLATFORM
+ depends on ARCH_SUNXI
+ default y
+ ---help---
+ Support for Allwinner A20 GMAC ethernet driver.
+
+ This selects Allwinner SoC glue layer support for the
+ stmmac device driver. This driver is used for A20 GMAC
+ ethernet controller.
+
config STMMAC_PCI
bool "STMMAC PCI bus support"
depends on STMMAC_ETH && PCI
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_STMMAC_ETH) += stmmac.o
stmmac-$(CONFIG_STMMAC_PLATFORM) += stmmac_platform.o
stmmac-$(CONFIG_STMMAC_PCI) += stmmac_pci.o
+stmmac-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c
@@ -0,0 +1,76 @@
+/**
+ * dwmac-sunxi.c - Allwinner sunxi DWMAC specific glue layer
+ *
+ * Copyright (C) 2013 Chen-Yu Tsai
+ *
+ * Chen-Yu Tsai <wens@csie.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/phy.h>
+#include <linux/stmmac.h>
+
+#define GMAC_IF_TYPE_RGMII 0x4
+
+#define GMAC_TX_CLK_MASK 0x3
+#define GMAC_TX_CLK_MII 0x0
+#define GMAC_TX_CLK_RGMII_INT 0x2
+
+static int sun7i_gmac_init(struct platform_device *pdev)
+{
+ struct resource *res;
+ struct device *dev = &pdev->dev;
+ void __iomem *addr = NULL;
+ struct plat_stmmacenet_data *plat_dat = NULL;
+ u32 priv_clk_reg;
+
+ plat_dat = dev_get_platdata(&pdev->dev);
+ if (!plat_dat)
+ return -EINVAL;
+
+ /* Get GMAC clock register in CCU */
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ addr = devm_ioremap_resource(dev, res);
+ if (IS_ERR(addr))
+ return PTR_ERR(addr);
+
+ priv_clk_reg = readl(addr);
+
+ /* Set GMAC interface port mode */
+ if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII)
+ priv_clk_reg |= GMAC_IF_TYPE_RGMII;
+ else
+ priv_clk_reg &= ~GMAC_IF_TYPE_RGMII;
+
+ /* Set GMAC transmit clock source. */
+ priv_clk_reg &= ~GMAC_TX_CLK_MASK;
+ if (plat_dat->interface == PHY_INTERFACE_MODE_RGMII
+ || plat_dat->interface == PHY_INTERFACE_MODE_GMII)
+ priv_clk_reg |= GMAC_TX_CLK_RGMII_INT;
+ else
+ priv_clk_reg |= GMAC_TX_CLK_MII;
+
+ writel(priv_clk_reg, addr);
+
+ /* mask out phy addr 0x0 */
+ plat_dat->mdio_bus_data->phy_mask = 0x1;
+
+ return 0;
+}
+
+const struct plat_stmmacenet_data sun7i_gmac_data = {
+ .has_gmac = 1,
+ .tx_coe = 1,
+ .init = sun7i_gmac_init,
+};
+
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -130,6 +130,9 @@ void stmmac_disable_eee_mode(struct stmm
bool stmmac_eee_init(struct stmmac_priv *priv);
#ifdef CONFIG_STMMAC_PLATFORM
+#ifdef CONFIG_DWMAC_SUNXI
+extern const struct plat_stmmacenet_data sun7i_gmac_data;
+#endif
extern struct platform_driver stmmac_pltfr_driver;
static inline int stmmac_register_platform(void)
{
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -35,6 +35,9 @@ static const struct of_device_id stmmac_
{ .compatible = "snps,dwmac-3.70a"},
{ .compatible = "snps,dwmac-3.710"},
{ .compatible = "snps,dwmac"},
+#ifdef CONFIG_DWMAC_SUNXI
+ { .compatible = "allwinner,sun7i-gmac", .data = &sun7i_gmac_data},
+#endif
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, stmmac_dt_ids);