2015-02-11 10:17:55 +00:00
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From 8eb79690a70cce34e9a1c35cf165716f78301d2e Mon Sep 17 00:00:00 2001
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From: P33M <P33M@github.com>
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Date: Fri, 20 Jun 2014 16:03:12 +0100
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Subject: [PATCH 045/114] dwc_otg: Fix various issues with root port and
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transaction errors
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Process the host port interrupts correctly (and don't trample them).
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Root port hotplug now functional again.
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Fix a few thinkos with the transaction error passthrough for fiq_fsm.
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---
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drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 7 +++----
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drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 6 +++++-
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drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 2 +-
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3 files changed, 9 insertions(+), 6 deletions(-)
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--- a/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
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2015-02-13 07:38:27 +00:00
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@@ -1348,10 +1348,9 @@ static inline uint32_t dwc_otg_read_comm
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2015-02-11 10:17:55 +00:00
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local_fiq_disable();
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/* Pull in the interrupts that the FIQ has masked */
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gintmsk.d32 |= ~(hcd->fiq_state->gintmsk_saved.d32);
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+ gintmsk.d32 |= gintmsk_common.d32;
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/* for the upstairs function to reenable - have to read it here in case FIQ triggers again */
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- reenable_gintmsk->d32 |= gintmsk.d32;
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- reenable_gintmsk->d32 |= ~(hcd->fiq_state->gintmsk_saved.d32);
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- reenable_gintmsk->d32 &= gintmsk_common.d32;
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+ reenable_gintmsk->d32 = gintmsk.d32;
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local_fiq_enable();
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}
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2015-02-13 07:38:27 +00:00
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@@ -1535,7 +1534,7 @@ int32_t dwc_otg_handle_common_intr(void
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2015-02-11 10:17:55 +00:00
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// fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "CILOUT %1d", retval);
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// fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "%08x", gintsts.d32);
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// fiq_print(FIQDBG_INT, otg_dev->hcd->fiq_state, "%08x", gintmsk_reenable.d32);
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- if (retval) {
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+ if (retval && fiq_enable) {
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DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk_reenable.d32);
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}
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--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c
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2015-02-13 07:38:27 +00:00
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@@ -696,7 +696,11 @@ static int notrace noinline fiq_fsm_do_h
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2015-02-11 10:17:55 +00:00
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fiq_print(FIQDBG_ERR, state, "ERRST %02d", n);
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if (hcint_probe.b.nak || hcint_probe.b.ack || hcint_probe.b.datatglerr) {
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fiq_print(FIQDBG_ERR, state, "RESET %02d", n);
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- st->nr_errors = 0;
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+ /* In some random cases we can get a NAK interrupt coincident with a Xacterr
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+ * interrupt, after the device has disappeared.
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+ */
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+ if (!hcint.b.xacterr)
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+ st->nr_errors = 0;
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hcintmsk.b.nak = 0;
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hcintmsk.b.ack = 0;
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hcintmsk.b.datatglerr = 0;
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--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
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2015-02-13 07:38:27 +00:00
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@@ -2619,7 +2619,7 @@ int32_t dwc_otg_hcd_handle_hc_n_intr(dwc
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2015-02-11 10:17:55 +00:00
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case FIQ_PASSTHROUGH_ERRORSTATE:
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/* Hook into the error count */
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fiq_print(FIQDBG_ERR, dwc_otg_hcd->fiq_state, "HCDERR%02d", num);
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- if (dwc_otg_hcd->fiq_state->channel[num].nr_errors) {
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+ if (!dwc_otg_hcd->fiq_state->channel[num].nr_errors) {
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qtd->error_count = 0;
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fiq_print(FIQDBG_ERR, dwc_otg_hcd->fiq_state, "RESET ");
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}
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