53 lines
1.5 KiB
Diff
53 lines
1.5 KiB
Diff
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From patchwork Fri Jul 21 18:36:23 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [1/5] e1000e: Fix error path in link detection
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From: Benjamin Poirier <bpoirier@suse.com>
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X-Patchwork-Id: 9857487
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Message-Id: <20170721183627.13373-1-bpoirier@suse.com>
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To: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Cc: Lennart Sorensen <lsorense@csclub.uwaterloo.ca>,
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intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
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linux-kernel@vger.kernel.org
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Date: Fri, 21 Jul 2017 11:36:23 -0700
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In case of error from e1e_rphy(), the loop will exit early and "success"
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will be set to true erroneously.
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Signed-off-by: Benjamin Poirier <bpoirier@suse.com>
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---
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drivers/net/ethernet/intel/e1000e/phy.c | 7 ++++---
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1 file changed, 4 insertions(+), 3 deletions(-)
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--- a/drivers/net/ethernet/intel/e1000e/phy.c
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+++ b/drivers/net/ethernet/intel/e1000e/phy.c
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@@ -1744,6 +1744,7 @@ s32 e1000e_phy_has_link_generic(struct e
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s32 ret_val = 0;
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u16 i, phy_status;
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+ *success = false;
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for (i = 0; i < iterations; i++) {
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/* Some PHYs require the MII_BMSR register to be read
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* twice due to the link bit being sticky. No harm doing
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@@ -1763,16 +1764,16 @@ s32 e1000e_phy_has_link_generic(struct e
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ret_val = e1e_rphy(hw, MII_BMSR, &phy_status);
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if (ret_val)
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break;
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- if (phy_status & BMSR_LSTATUS)
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+ if (phy_status & BMSR_LSTATUS) {
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+ *success = true;
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break;
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+ }
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if (usec_interval >= 1000)
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msleep(usec_interval / 1000);
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else
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udelay(usec_interval);
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}
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- *success = (i < iterations);
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-
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return ret_val;
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}
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