/dts-v1/;

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "netgear,r6120", "mediatek,mt7628an-soc";
	model = "Netgear AC1200 R6120";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x4000000>;
	};

	gpio-keys-polled {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";

		lan {
			label = "r6120:green:lan";
			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
		};

		led_power: power {
			label = "r6120:green:power";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};

		wlan {
			label = "r6120:green:wlan2g";
			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
		};

		wlan_orange {
			label = "r6120:orange:wlan2g";
			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
		};

		wlan5 {
			label = "r6120:green:wlan5g";
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
		};

		wlan5_orange {
			label = "r6120:orange:wlan5g";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};
	};
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "p0led_an", "p1led_an", "p2led_an",
				       "p3led_an", "p4led_an", "wdt", "wled_an";
			ralink,function = "gpio";
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;
		m25p,chunked-io = <32>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x40000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x20000>;
				read-only;
			};

			nvram: partition@60000 {
				label = "nvram";
				reg = <0x60000 0x30000>;
				read-only;
			};

			partition@90000 {
				label = "firmware";
				reg = <0x90000 0xf60000>;
			};

			partition@ff0000 {
				label = "reserved";
				reg = <0xff0000 0x10000>;
				read-only;
			};
		};
	};
};

&wmac {
	status = "okay";
	mtd-mac-address = <&nvram 0x100b0>;
	mediatek,mtd-eeprom = <&factory 0x20000>;
};

&ethernet {
	mtd-mac-address = <&nvram 0x100b0>;
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x28000>;
		ieee80211-freq-limit = <5000000 6000000>;
		mtd-mac-address = <&nvram 0x100b0>;
		mtd-mac-address-increment = <(2)>;
	};
};
